K4S640432F Datasheet, PDF (6/11 Pages) Samsung semiconductor – 4M x 4Bit x 4 Banks Synchronous DRAM LVTTL

K4S640432F
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)
Parameter
Symbol
Test Condition
Operating current
(One bank active)
Burst length = 1
ICC1 tRC ≥ tRC(min)
IO = 0 mA
Precharge standby current in
power-down mode
Precharge standby current in
non power-down mode
ICC2P CKE ≤ VIL(max), tCC = 10ns
ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC2NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
ICC3P CKE ≤ VIL(max), tCC = 10ns
ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC3NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
Operating current
(Burst mode)
IO = 0 mA
ICC4
Page burst
4Banks Activated
tCCD = 2CLKs
Refresh current
ICC5 tRC ≥ tRC(min)
C
Self refresh current
ICC6 CKE ≤ 0.2V
L
Notes : 1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S640432F-TC**
4. K4S640432F-TL**
5. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ)
CMOS SDRAM
Version
Unit Note
- 75 - 1H - 1L
70
65
65 mA 1
1
mA
1
15
mA
6
3
mA
3
30
mA
25
100
80
80 mA 1
135
125
125 mA 2
1
mA 3
400
uA 4
Rev.0.1 Sept. 2001