K4S280832D Datasheet, PDF (6/11 Pages) Samsung semiconductor – 128Mbit SDRAM (4M x 8Bit x 4 Banks Synchronous DRAM)

K4S280832D
CMOS SDRAM
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)
Parameter
Symbol
Test Condition
-7C
Operating current
(One bank active)
Burst length = 1
ICC1 tRC ≥ tRC(min)
IO = 0 mA
100
Precharge standby current
in power-down mode
Precharge standby current
in non power-down mode
ICC2P CKE ≤ VIL(max), tCC = 10ns
ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC2NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
ICC3P CKE ≤ VIL(max), tCC = 10ns
ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC3NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
IO = 0 mA
Operating current
(Burst mode)
ICC4
Page burst
4Banks Activated
110
tCCD = 2CLKs
Refresh current
ICC5 tRC ≥ tRC(min)
220
C
Self refresh current
ICC6 CKE ≤ 0.2V
L
Notes : 1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S280832D-TC**
4. K4S280832D-TL**
5. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ)
Version
-75 -1H
90 90
2
2
20
10
5
5
30
25
110 100
200 190
2
800
Unit Note
-1L
90 mA 1
mA
mA
mA
mA
mA
100 mA 1
190 mA 2
mA 3
uA 4
Rev. 0.1 Sept. 2001