K4S280432C Datasheet, PDF (6/11 Pages) Samsung semiconductor – 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL

K4S280432C
CMOS SDRAM
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)
Parameter
Operating current
(One bank active)
Symbol
Test Condition
Burst length = 1
ICC1 tRC ≥ tRC(min)
IO = 0 mA
Version
Unit Note
-75
-1H
-1L
120
110
110 mA 1
Precharge standby current in
power-down mode
ICC2P CKE ≤ VIL(max), tCC = 10ns
ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞
1
mA
1
Precharge standby current in
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
20
non power-down mode
ICC2NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
7
mA
Active standby current in
power-down mode
ICC3P CKE ≤ VIL(max), tCC = 10ns
ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞
5
mA
5
Active standby current in
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
30
mA
non power-down mode
(One bank active)
ICC3NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
20
mA
Operating current
(Burst mode)
IO = 0 mA
ICC4 ^{Page burst}
4Banks Activated
tCCD = 2CLKs
Refresh current
ICC5 tRC ≥ tRC(min)
C
Self refresh current
ICC6 CKE ≤ 0.2V
L
Notes : 1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S280432C-TC**
4. K4S280432C-TL**
5. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ)
140
115
115 mA 1
220
210
210 mA 2
1.5
mA 3
800
uA 4
Rev. 0.0 Mar. 2000