M466F0804DT1-L Datasheet, PDF (5/20 Pages) Samsung semiconductor – 8M x 64 DRAM SODIMM Using 4Mx16, 4K Refresh 3.3V, Low power/Self-Refresh

DRAM MODULE
M466F0804DT1-L
AC CHARACTERISTICS (0°C≤TA≤70°C, VCC=3.3V±0.3V. See notes 1,2.)
Test condition : Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V, output loading CL=100pF
Parameter
Symbol
-50
Min
Max
Column address to W delay time
tAWD
45
CAS precharge to W delay time
tCPWD
47
CAS setup time (CAS-before-RAS refresh)
tCSR
5
CAS hold time (CAS-before-RAS refresh)
tCHR
10
RAS to CAS precharge time
tRPC
5
Access time from CAS precharge
tCPA
28
Hyper page mode cycle time
tHPC
20
Hyper page mode read-modify write cycle time
tHPRWC
67
CAS precharge time (Hyper page cycle)
tCP
7
RAS pulse width (Hyper page cycle)
tRASP
50
200K
RAS hold time from CAS precharge
tRHCP
30
W to RAS precharge time (C-B-R refresh)
tWRP
10
W to RAS hold time (C-B-R refresh)
tWRH
10
OE access time
tOEA
13
OE to data delay
tOED
10
Output buffer turn off delay time from OE
tOEZ
3
13
OE command hold time
tOEH
5
Output data hold time
tDOH
5
Output buffer turn off delay from RAS
tREZ
3
13
Output buffer turn off delay from W
tWEZ
3
13
W to data delay
tWED
15
OE to CAS hold time
tOCH
5
CAS hold time to OE
tCHO
5
OE precharge time
tOEP
5
W pulse width(Hyper page cycle)
tWPE
5
RAS pulse width (C-B-R self refresh)
tRASS
100
RAS precharge time (C-B-R self refresh)
tRPS
90
CAS hold time (C-B-R self refresh)
tCHS
-50
-60
Min
Max
53
58
5
10
5
35
25
73
10
60
200K
35
10
10
15
13
3
13
5
5
3
15
3
15
15
5
5
5
5
100
110
-50
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
us
ns
ns
Note
6
6
16
17
3
10
10
13
3
11
19,20,21
19,20,21
19,20,21
REV. 0.1 Oct. 2000