KBE00F005A Datasheet, PDF (5/87 Pages) Samsung semiconductor – 512Mb NAND*2 + 256Mb Mobile SDRAM*2

KBE00F005A-D411
PIN DESCRIPTION
Pin Name
CLK
CKE
CS,CS1
RAS
CAS
WEd
A0 ~ A12
BA0 ~ BA1
DQM0 ~ DQM3
DQ0 ~ DQ31
Vdd
Vddq
Vss
Vssq
Pin Function(Mobile SDRAM)
System Clock
Clock Enable
Chip Select
Row Address Strobe
Column Address Strobe
Write Enable
Address Input
Bank Address Input
Input/Output Data Mask
Data Input/Output
Power Supply
Data Out Power
Ground
DQ Ground
MCP MEMORY
Pin Name
CE
RE
WP
WEn
ALE
CLE
R/B
IO0 ~ IO7
Vcc
Vss
Pin Function(NAND Flash)
Chip Enable
Read Enable
Write Protection
Write Enable
Address Latch Enable
Command Latch Enable
Ready/Busy Output
Data Input/Output
Power Supply
Ground
Pin Name
NC
DNU
Pin Function
No Connection
Do Not Use
ORDERING INFORMATION
KB E 00 F 0 0 5 A - D 411
Samsung
MCP Memory(4chips)
Device Type
NAND + NAND + SDRAM+SDRAM
NOR Flash Density, Voltage,
Organization, Bank Size, Boot Block
00 = None
NAND Flash Density, Voltage, Organization
F = 512M+512M, 2.7V/2.7V, x8
UtRAM Density, Voltage, Organization
0 = None
SRAM Density, Voltage, Organization
0 = None
Access Time
411 : NAND Flash 50ns
NAND Flash 50ns
Mobile SDRAM 9ns
Mobile SDRAM 9ns
Package
D = FBGA(Lead-Free)
Version
A = 2nd Generation
SDRAM Interface, Density,
Voltage, Organization, Option
5 = M-SDR, 256M+256M, 1.8V/1.8V, x32
NOTE :
1. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life is potentially at stake.
Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific purpose,
such as medical, aerospace, nuclear, military, vehicular or undersea repeater use.
5
Revision 1.0
June 2005