K4M64163PH Datasheet, PDF (5/12 Pages) Samsung semiconductor – 1M x 16Bit x 4 Banks Mobile SDRAM in 54CSP

K4M64163PH - R(B)G/F
Mobile-SDRAM
DC CHARACTERISTICS
Recommended operating conditions(Voltage referenced to VSS = 0V, TA = -25°C ~ 85°C for Extended, -25°C ~ 70°C for Commerial)
Parameter
Symbol
Test Condition
Version
-75
-90
-IL
Unit Note
Operating Current
(One Bank Active)
Burst length = 1
ICC1 tRC ≥ tRC(min)
IO = 0 mA
25
25
25 mA 1
Precharge Standby Current in ^{ICC2P CKE ≤ VIL(max), tCC = 10ns}
power-down mode
ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞
0.3
mA
0.3
Precharge Standby Current
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
6.5
in non power-down mode
ICC2NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
1
mA
Active Standby Current
in power-down mode
ICC3P CKE ≤ VIL(max), tCC = 10ns
ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞
5
mA
1
Active Standby Current
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
12
mA
in non power-down mode
(One Bank Active)
ICC3NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
1
mA
Operating Current
(Burst Mode)
ICC4
IO = 0 mA
Page burst
4Banks Activated
tCCD = 2CLKs
60
50
50 mA 1
Refresh Current
ICC5 tARFC ≥ tARFC(min)
50
50
50 mA 2
Internal TCSR Max 40
Max 85 °C
Self Refresh Current
ICC6 CKE ≤ 0.2V
Full Array
90
1/2 of Full Array
80
180
160
uA
1/4 of Full Array
75
150
NOTES:
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ).
5
December 2003