K4M51163LE Datasheet, PDF (5/12 Pages) Samsung semiconductor – 8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA

K4M51163LE - Y(P)C/L/F
Mobile-SDRAM
DC CHARACTERISTICS
Recommended operating conditions (Voltage referenced to VSS = 0V, TA = -25 to 70°C)
Parameter
Symbol
Test Condition
Version
-80 -1H -1L
Unit Note
Operating Current
(One Bank Active)
Burst length = 1
ICC1 tRC ≥ tRC(min)
IO = 0 mA
150 145 130 mA 1
Precharge Standby Current in ^{ICC2P CKE ≤ VIL(max), tCC = 10ns}
power-down mode
ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞
1.5
mA
1.5
Precharge Standby Current
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
20
in non power-down mode
ICC2NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
10
mA
Active Standby Current
in power-down mode
ICC3P CKE ≤ VIL(max), tCC = 10ns
ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞
8
mA
8
Active Standby Current
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
45
mA
in non power-down mode
(One Bank Active)
ICC3NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
40
mA
Operating Current
(Burst Mode)
ICC4
IO = 0 mA
Page burst
4Banks Activated
tCCD = 2CLKs
230 210 190 mA 1
Refresh Current
ICC5 tRC ≥ tRC(min)
350 320 280 mA 2
-C
1800
4
uA
-L
1300
5
Self Refresh Current
ICC6 CKE ≤ 0.2V
Internal TCSR
Max 40 Max 70 °C 3
Full Array
850
-F
1/2 of Full Array
600
1300
900
uA 6
1/4 of Full Array
500
700
NOTES:
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Internal TCSR can be supported(In commercial Temp : Max 40°C/Max 70°C).
4. K4M51163LE-Y(P)C**
5. K4M51163LE-Y(P)L**
6. K4M51163LE-Y(P)F**
7. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ).
February 2004