KM681000C Datasheet, PDF (4/10 Pages) Samsung semiconductor – 128K x8 bit Low Power CMOS Static RAM

KM681000C Family
PRELIMINARY
CMOS SRAM
RECOMMENDED DC OPERATING CONDITIONS¹⁾
Item
Supply voltage
Ground
Input high voltage
Input low voltage
Symbol
Min
Typ
Vcc
4.5
5.0
Vss
0
0
VIH
2.2
-
VIL
-0.5³⁾
-
Note
1. Commercial Product : TA=0 to 70°C and Industrial Product :TA=-40 to 85°C, otherwise specified.
2. Overshoot : Vcc+3.0V for≤30ns pulse width.
3. Undershoot : -3.0V for≤30ns pulse width.
4. Overshoot and undershoot are sampled, not 100% tested.
Max
5.5
0
Vcc+0.5²⁾
0.8
Unit
V
V
V
V
CAPACITANCE¹⁾ (f=1MHz, TA=25°C)
Item
Input capacitance
Input/Output capacitance
1. Capacitance is sampled not, 100% tested.
Symbol
CIN
CIO
Test Condition
VIN=0V
VIO=0V
Min
Max
Unit
-
6
pF
-
8
pF
DC AND OPERATING CHARACTERISTICS
Item
Symbol
Test Conditions
Min Typ Max Unit
Input leakage current
ILI VIN=Vss to Vcc
-1 -
1 µA
Output leakage current
ILO CS1=VIH or CS2=VIL or OE=VIH or WE=VIL, VIO=Vss to Vcc
-1 -
1 µA
Operating power supply current ICC IIO=0mA, CS1=VIL, CS2=VIH, VIN=VIH or VIL, Read
-
5 10 mA
Average operating current
ICC1
Cycle time=1µs, 100% duty, IIO=0mA, CS1≤0.2V,
CS2≥VCC-0.2V, VIN≤0.2V or VIN≥VCC-0.2V
Read -
Write
2
5 _mA
20 35
ICC2 Cycle time=Min, 100% duty, IIO=0mA, CS1=VIL, CS2=VIH,VIN=VIL or VIH -
45 60 mA
Output low voltage
VOL IOL=2.1mA
-
- 0.4 V
Output high voltage
VOH IOH=-1.0mA
2.4 -
-V
Standby Current(TTL)
ISB CS1=VIH, CS2=VIL, Other input=VIL or VIH
-
-
3 mA
Standby
Current
(CMOS)
KM681000CL
KM681000CL-L
KM681000CLI
CS1≥Vcc-0.2V, CS2≥Vcc-0.2V
ISB1 or CS2≤0.2V
Other input =0~Vcc
Low Power
Low Low Power
Low power
-
1 50
-
0.3 10 _µA
-
1 50
KM681000CLI-L
Low Low Power
- 0.3 15
4
Revision 2.0
November 1997