S3C72I9 Datasheet, PDF (31/32 Pages) Samsung semiconductor – The S3C72I9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung Arrangeable M

S3P72I9 OTP
S3C72I9/P72I9
Table 16-4. D.C. Electrical Characteristics
(T_A = - 40 ^°C to + 85 ^°C, V_DD = 1.8 V to 5.5 V)
Parameter Symbol
Conditions
Min
Typ
Supply
I_DD1 ^{(2) V}DD ^{= 5 V ± 10%}
6.0 MHz
–
5.1
Current
Crystal oscillator
4.19 MHz
3.9
C1 = C2 = 22 pF
V_DD = 3 V ± 10%
6.0 MHz
2.5
4.19 MHz
1.8
I_DD2 ⁽²⁾
Idle mode;
V_DD = 5 V ± 10%
6.0 MHz
4.19 MHz
1.3
1.2
Crystal oscillator
C1 = C2 = 22 pF
V_DD = 3 V ± 10%
6.0 MHz
0.5
4.19 MHz
0.44
I_DD3 ⁽³⁾
I_DD4 ⁽³⁾
V_DD = 3 V ± 10%
32 kHz crystal oscillator
Idle mode; V_DD = 3 V ± 10%
32 kHz crystal oscillator
–
22.8
6.4
I_DD5 Stop mode;
SCMOD =
2.5
V_DD = 5 V ± 10%
0000B
Stop mode;
XT = 0V
0.5
V_DD = 3 V ± 10%
Stop mode;
SCMOD =
0.2
V_DD = 5 V ± 10%
0100B
Stop mode;
0.1
V_DD = 3 V ± 10%
Max
Units
10.0
mA
7.5
4.0
3.0
2.5
1.8
1.5
1.0
35
µA
15
5
3
3
2
NOTES:
1. Data includes power consumption for subsystem clock oscillation.
2. When the system clock control register, SCMOD, is set to 1001B, main system clock oscillation stops and the
subsystem clock is used.
3. Currents in the following circuits are not included; on-chip pull-up resistors, internal LCD voltage dividing resistors,
output port drive currents.
16-4