S3C72C8 Datasheet, PDF (26/37 Pages) Samsung semiconductor – The S3C72C8 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung Arrangeable M

S3C72C8/P72C8
TIMING WAVEFORMS
ELECTRICAL DATA
VDD
RESET
Execution of
STOP Instruction
Stop Mode
Data Retention Mode
Internal Reset
Operation
Idle Mode
Operating Mode
VDDDR
tSREL
tWAIT
Figure 15-2. Stop Mode Release Timing When Initiated By RESET
Stop Mode
Data Retention Mode
VDD
Execution of
STOP Instruction
VDDDR
Power-down Mode Terminating Signal
(Interrupt Request)
Idle Mode
Normal
Operating
Mode
tSREL
tWAIT
Figure 15-3. Stop Mode Release Timing When Initiated By Interrupt Request
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