K9F6408U0A-TCB0 Datasheet, PDF (25/26 Pages) Samsung semiconductor – 8M x 8 Bit NAND Flash Memory

K9F6408U0A-TCB0, K9F6408U0A-TIB0
FLASH MEMORY
READY/BUSY
The device has a R/B output that provides a hardware method of indicating the completion of a page program, erase and random
read completion. The R/B pin is normally high but transitions to low after program or erase command is written to the command reg-
ister or random read is started after address loading. It returns to high when the internal controller has finished the operation. The pin
is an open-drain driver thereby allowing two or more R/B outputs to be Or-tied. An appropriate pull-up resister is required for proper
operation and the value may be calculated by the following equation.
Rp
VCC
R/B
open drain output
GND
Device
VCC(Max.) - VOL(Max.)
Rp =
=
IOL + ∑IL
3.2V
8mA + ∑IL
where IL is the sum of the input currents of all devices tied to the
R/B pin.
DATA PROTECTION
The device is designed to offer protection from any involuntary program/erase during power-transitions. An internal voltage detector
disables all functions whenever Vcc is below about 2V. WP pin provides hardware protection and is recommended to be kept at VIL
during power-up and power-down as shown in Figure 11. The two step command sequence for program/erase provides additional
software protection.
Figure 11. AC Waveforms for Power Transition
~ 2.5V
VCC
High
WP
~ 2.5V
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