S3P826A Datasheet, PDF (238/307 Pages) Samsung semiconductor – 8-Bit CMOS Microcontroller

S3C826A/P826A
BASIC TIMER and TIMER 0
Pulse Width Modulation Mode
Pulse width modulation (PWM) mode lets you program the width (duration) of the pulse that is output at the
T0PWM (P2.1) pin. As in interval timer mode, a match signal is generated when the counter value is identical to
the value written to the timer 0 data register. In PWM mode, however, the match signal does not clear the
counter. Instead, it runs continuously, overflowing at "FFH", and then continues incrementing from "00H".
Although you can use the match signal to generate a timer 0 overflow interrupt, interrupts are not typically used in
PWM-type applications. Instead, the pulse at the T0PWM (P2.1) pin is held to Low level as long as the reference
data value is less than or equal to ( ≤ ) the counter value and then the pulse is held to High level for as long as
the data value is greater than ( > ) the counter value. One pulse width is equal to t_CLK × 256 (see Figure 10-6).
T0CON.0
Capture Signal
Interrupt Enable/Disable
T0OVF(IRQ0)
T0CON.1
CLK
8-Bit Up Counter
INTPND.0
(Overflow INT)
8-Bit Comparator
Match
Timer 0 Buffer Register
Timer 0 Data Register
Match Signal
T0CON.2
T0OVF
M
U
INTPND.1
X
Pending
T0CON.4-.3
T0INT (IRQ0)
(Match INT)
T0PWM
Output (P2.1)
High level when
data > counter,
Lower level when
data < counter
Figure 10-6. Simplified Timer 0 Function Diagram: PWM Mode
10-9