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K4S561632B Datasheet, PDF (2/11 Pages) Samsung semiconductor – 256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL | |||
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K4S561632B
Revision 0.1 (March 10, 2000)
⢠Deleted -80 Product Specification
⢠Changed the Current values of ICC5, ICC6
⢠Changed tOH of -75 Product from 2.7ns to 3ns
⢠Changed the Bank select address in SIMPLIFIED TRUTH TABLE Notes 4.
BA0
Low
Low
High
High
BA1
Low
High
Low
High
Before
Bank A
Bank B
Bank C
Bank D
After
Bank A
Bank C
Bank B
Bank D
Revision 0.2 (May 30, 2000)
⢠Eliminate "Preliminary"
⢠Add "133MHz" in IBIS SPECIFICATION
CMOS SDRAM
Rev. 0.2 May.2000
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