S3C94A5 Datasheet, PDF (185/246 Pages) Samsung semiconductor – 8-BIT CMOS MICROCONTROLLER

16-BIT TIMER 0
S3C94A5/F94A5
Capture Mode
In capture mode, a signal edge that is detected at the T0CAP (P3.4) pin opens a gate and loads the current counter
value into the timer 0 data register. You can select rising or falling edges to trigger this operation.
Timer 0 also gives you capture input source: the signal edge at the T0CAP (P3.4) pin. You select the capture input
by setting the values of the timer 0 capture input selection bits in the port 3 control register, P3CONH.4–.3, (page 0,
F2H). When P3CONH.4–.3 is "00", the T0CAP input is selected.
Both kinds of timer 0 interrupts can be used in capture mode: the timer 0 overflow interrupt is generated whenever a
counter overflow occurs; the timer 0 match/capture interrupt is generated whenever the counter value is loaded into
the timer 0 data register.
By reading the captured data value in T0DATAH/T0DATAL, and assuming a specific value for the timer 0 clock
frequency, you can calculate the pulse width (duration) of the signal that is being input at the T0CAP pin (see Figure
11-5).
CLK
T0CAP input
(P3.4)
T0CON.4-.3
16-Bit Up Counter
T0CON.0
INTPND3.1
T0OVF
(Overflow INT)
M
U
Match Signal ^X
Interrupt Enable/Disable
T0CON.1
INTPND3.0
Pending
T0INT
(Capture INT)
Timer 0 Data Register
T0CON.4-.3
Figure 11-5. Simplified Timer 0 Function Diagram: Capture Mode
11-6