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S6C1104 Datasheet, PDF (17/20 Pages) Samsung semiconductor – 6 BIT 384 CHANNEL RSDS TFT-LCD SOURCE DRIVER | |||
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6 BIT 384 CHANNEL RSDS SOURCE DRIVER
S6C1104
AC CHARACTERISTICS
Table 7. AC Characteristics
(Ta = - 20 to 75 °C, VDD1 = 2.7 to 3.6 V, VDD2 = 7.0 to 12.0 V, VSS1 = VSS2 = 0 V)
Parameter
Symbol
Condition
Min.
Typ. Max.
Clock pulse width
PWCLK
-
Clock pulse low period
PWCLK(L)
-
11.7
-
-
4
-
-
Clock pulse high period PWCLK(H) -
4
-
-
Data setup time
Data hold time
Start pulse setup time
Start pulse hold time
Start pulse delay time
tSETUP1
tHOLD1
tSETUP2
tHOLD2
tPLH1
(1)
(1)
(1)
(1)
CL = 15pF
2
-
-
0
-
-
4
-
-
2
-
-
-
-
7.7
DIO signal pulse width
PWDIO
-
1CLKP
-
2CLKP
CLK1 setup time
tSETUP3
-
2CLKP
-
-
CLK1 high pulse width
PWCLK1
-
5CLKP
-
-
Driver output delay time1 tPHL1
(2) (4)
-
-
6
Driver output delay time2 tPHL2
(3) (4)
-
-
10
Last data timing
tLDT
-
1CLKP
-
-
CLK1-CLKP time
POL-CLK1 time
CLK1-POL time
tCLK1-CLKP CLK1 â â CLKP â
4
-
-
tPOL-CLK1 POL â or â â CLK1 â
14
-
-
tCLK1-POL CLK1â â POL â or â
10
-
-
NOTES:
(1). VCMRSDS = +1.1V, VDIFFRSDS = VRSDSP - VRSDSN = ±200mV
(2). The value is specified when the drive voltage value reaches the target output voltage level of 90%
(3). The value is specified when the drive voltage value reaches the target output voltage level of 6-bit accuracy.
(4). Yout load condition (refer to Figure 6)
Unit
ns
CLKP
period
µs
CLKP
period
ns
Measure Point
Y1
10kâ¦
Y2
20kâ¦
30pF
Y384
20kâ¦
30pF
30pF
Figure 6. Yout load condition
17
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