K9F1208Q0B Datasheet, PDF (15/45 Pages) Samsung semiconductor – 64M x 8 Bit NAND Flash Memory

K9F1208Q0B
K9F1208D0B
K9F1208U0B
Advance
FLASH MEMORY
AC CHARACTERISTICS FOR OPERATION
Parameter
Min
Max
Symbol
Unit
K9F1208Q0B K9F1208D0B K9F1208U0B K9F1208Q0B K9F1208D0B K9F1208U0B
Data Transfer from Cell to Register tR
-
-
-
15
15
15
µs
ALE to RE Delay
tAR
10
10
10
-
-
-
ns
CLE to RE Delay
tCLR
10
10
10
-
-
-
ns
Ready to RE Low
tRR
20
20
20
-
-
-
ns
RE Pulse Width
tRP
25
25
25
-
-
-
ns
WE High to Busy
tWB
-
-
-
100
100
100
ns
Read Cycle Time
tRC
50
50
50
-
-
-
ns
RE Access Time
tREA
-
-
-
35
30
30
ns
CE Access Time
tCEA
-
-
-
45
45
45
ns
RE High to Output Hi-Z
tRHZ
-
-
-
30
30
30
ns
CE High to Output Hi-Z
tCHZ
-
-
-
20
20
20
ns
RE or CE High to Output hold
tOH
15
15
15
-
-
-
ns
RE High Hold Time
tREH
15
15
15
-
-
-
ns
Output Hi-Z to RE Low
tIR
0
0
0
-
-
-
ns
WE High to RE Low
tWHR
60
60
60
-
-
-
ns
Device resetting time(Read/Pro-
tRST
-
-
-
5/10/500⁽¹⁾ 5/10/500⁽¹⁾ 5/10/500⁽¹⁾ µs
Parameter
Symbol
Min
Max
Unit
Last RE High to Busy(at sequential read)
tRB
K9F1208U0B-
Y,V,P,F only
CE High to Ready(in case of interception by CE at read)
tCRY
CE High Hold Time(at the last serial read)⁽²⁾
tCEH
-
100
ns
-
50 +tr(R/B)⁽³⁾
ns
100
-
ns
NOTE: 1. If reset command(FFh) is written at Ready state, the device goes into Busy for maximum 5us.
2. To break the sequential read cycle, CE must be held high for longer time than tCEH.
3. The time to Ready depends on the value of the pull-up resistor tied R/B pin.
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