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S3C820B Datasheet, PDF (14/22 Pages) Samsung semiconductor – S3C-SERIES MICROCONTROLLERS
ELECTRICAL DATA
S3C820B
Table 15-2. D.C. Electrical Characteristics (Continued)
(TA = – 40°C to + 85°C, VDD = 2.2 V to 4.5 V)
Parameter Symbol
Conditions
Min
Typ
Max
Unit
Middle output
VOM1 VMN = VLCD – (N/5) COM0–17 VM1 – 0.2
VM1
VM1 + 0.2
V
voltage
VOM2 × VLCD
SEG0–64 VM2 – 0.2
VM2
VM2 + 0.2
VOM3 N = 1, 2, 3, and 4 SEG0–64 VM3 – 0.2
VM3
VM3 + 0.2
VOM4
COM0–17 VM4 – 0.2
VM4
VM4 + 0.2
|VLCD–VCOMi|
voltage drop
(i = 0–17)
VDC VLCD = 3.0 V to 6.0 V
– 15 µA per common pin
–
–
120
mV
|VLCD–VSEGx|
voltage drop
(x = 0–64)
VDS VLCD = 3.0 V to 6.0 V
– 15 µA per common pin
–
–
120
mV
LCD driving
voltage
VLCD –
3.0
–
6.0
V
Pull-up resistors
RL1 VIN = 0 V; TA = 25 °C; VDD = 3.0
30
Ports 0, 1, 2, and 3
80
200
kΩ
RL2 VIN = 0 V; TA = 25 °C; VDD = 3.0
300
500
800
RESET only
LCD voltage
dividing resistor
RLCD
VLCD = 3.0 V to 6.0 V
TA = 25 °C
40
60
80
kΩ
Supply current
(note)
IDD1 VDD = 3.0 V ± 10%
2 MHz crystal
–
1.5
3.5
mA
IDD2 Idle mode;
VDD = 3.0 V ± 10%
2 MHz crystal
0.5
1.5
IDD3 VDD = 3.0 V ± 10%
32 kHz crystal
30
70
µA
IDD4 Idle mode;
VDD = 3.0 V ± 10%
32 kHz crystal
6
12
IDD5 Stop mode;
VDD = 3.0 V ± 10%
XTIN = 0 V
0.5
1
NOTES:
1. Supply current does not include current drawn through internal pull-up resistors, LCD voltage dividing resistors, voltage
doubler, or external output current loads.
2. IDD1 and IDD2 include power consumption for subsystem clock oscillation.
3. IDD3 and IDD4 are current when main system clock oscillation stops and the subsystem clock is used.
15-4