S3C80M4 Datasheet, PDF (139/248 Pages) Samsung semiconductor – 8-BIT CMOS MICROCONTROLLERS USERS MANUAL

S3C80M4/F80M4
INSTRUCTION SET
DI — Disable Interrupts
DI
Operation:
Flags:
SYM (0) ← 0
Bit zero of the system mode control register, SYM.0, is cleared to "0", globally disabling all
interrupt processing. Interrupt requests will continue to set their respective interrupt pending bits,
but the CPU will not service them while interrupt processing is disabled.
No flags are affected.
Format:
opc
Bytes
1
Cycles
4
Opcode
(Hex)
8F
Example:
Given: SYM = 01H:
DI
If the value of the SYM register is 01H, the statement "DI" leaves the new value 00H in the
register and clears SYM.0 to "0", disabling interrupt processing.
Before changing IMR, interrupt pending and interrupt source control
register, be sure DI state.
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