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S6E63D6 Datasheet, PDF (106/155 Pages) Samsung semiconductor – 240 RGB X 320 Dot 1-Chip Driver IC with LTPS Interface for 262,144 Color AMOLED Display Panel
S6E63D6 PRELIMINARY VER. 0.0
240 RGB X 320 DOT 1-CHIP DRIVER IC WITH LTPS INTERFACE FOR 262,144 COLOR AMOLED
Preliminary
When VSYNC based link wake-up register (50h: VWAKE_EN) is set, client initiated wake-up is executed in
synchronization with the vertical-sync signal which generated in S6E63D6.
Using VSYNC based link wake-up, tearing-less display can be accomplished if interface speed and wake-up time is
well known.
The following figure shows detailed timing for VSYNC based link wake-up.
SYNC STATE
AB
VWAKE_EN
link_active
frame_update
client_wakeup
HIBERNATION STATE
WAKE-UP STATE SYNC STATE
CD
EF
Figure70: VSYNC based link wake-up procedure
The Detailed descriptions for labeled events are as follows:
A. MDDI host writes to the VSYNC based link wakeup register to enable a wake-up based on internal vertical-sync
signal.
B. link_active goes low when the host puts in the link into hibernation after no more data needs to be sent to the
S6E63D6.
C. frame_update, the internal vertical-sync signal goes high indicating that update pointer has wrapped around and
is now reading from the beginning of the frame buffer. Link wake-up point can be set using WKF and WKL (51h)
registers. WKF specifies the number of frame before wake-up; WKL specifies the number of lines before wake-up.
D. client_wakeup input to the MDDI client goes high to start the client initiated link wake-up.
E. link_active goes high after the host brings the link out of hibernation.
F. After link wake-up, client_wakeup signal and the VWAKE_EN register are cleared automatically.
GPIO Based Link Wake-up
In VSYNC-based link wake-up, wake-up enable register setting prior to link shut-down. GPIO based Link wake-up is
enabled by interrupt from outside of the IC. For GPIO based link wake-up, GPIO interrupt enable and GPIO PAD
mode (to input mode) setting must be set. Once S6E63D6 receive interrupt, internal GPIO base link wake-up flag set
to high, and the following procedure is similar to that of VSYNC based link wake-up.
The following figure shows detailed timing for GPIO based link wake-up.
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