K4H1G0438A Datasheet, PDF (10/24 Pages) Samsung semiconductor – 1Gb A-die SDRAM Specification

K4H1G0438A
K4H1G0838A
DDR SDRAM
64M x 4Bit x 4 Banks / 32M x 8Bit x 4 Banks Double Data Rate SDRAM
9.0 General Description
The K4H1G0438A / K4H1G0838A is 1,073,741,824 bits of double data rate synchronous DRAM organized as 4x 67,108,864/ 4x
33,554,432 words by 4/ 8bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous features with Data Strobe
allow extremely high performance up to 400Mb/s per pin. I/O transactions are possible on both edges of DQS. Range of operating fre-
quencies, programmable burst length and programmable latencies allow the device to be useful for a variety of high performance mem-
ory system applications.
10.0 Absolute Maximum Rating
Parameter
Symbol
Value
Voltage on any pin relative to V_SS
V_IN, V_OUT
-0.5 ~ 3.6
Voltage on V_DD & V_DDQ supply relative to V_SS
V_DD, V_DDQ
-1.0 ~ 3.6
Storage temperature
T_STG
-55 ~ +150
Power dissipation
P_D
1.5
Short circuit current
I_OS
50
Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommend operation condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Unit
V
V
°C
W
mA
11.0 DC Operating Conditions Recommended operating conditions(Voltage referenced to VSS=0V, TA=0 to 70°C)
Parameter
Symbol
Min
Max
Unit Note
Supply voltage(for device with a nominal VDD of 2.5V for DDR266/333)
VDD
2.3
2.7
V
Supply voltage(for device with a nominal VDD of 2.6V for DDR400)
VDD
2.5
2.7
V
I/O Supply voltage(for device with a nominal VDD of 2.5V for DDR266/333)
VDDQ
2.3
2.7
V
I/O Supply voltage(for device with a nominal VDD of 2.5V for DDR400)
VDDQ
2.5
2.7
V
I/O Reference voltage
I/O Termination voltage(system)
Input logic high voltage
Input logic low voltage
Input Voltage Level, CK and CK inputs
Input Differential Voltage, CK and CK inputs
V-I Matching: Pullup to Pulldown Current Ratio
Input leakage current
Output leakage current
Output High Current(Normal strengh driver) ;V_OUT = V_TT + 0.84V
Output High Current(Normal strengh driver) ;V_OUT = V_TT - 0.84V
Output High Current(Half strengh driver) ;V_OUT = V_TT + 0.45V
Output High Current(Half strengh driver) ;V_OUT = V_TT - 0.45V
VREF 0.49*VDDQ 0.51*VDDQ V
1
V_TT
VREF-0.04 VREF+0.04
V
2
VIH(DC) VREF+0.15 VDDQ+0.3
V
VIL(DC)
-0.3
VREF-0.15
V
VIN(DC)
-0.3
VDDQ+0.3
V
VID(DC)
0.36
VDDQ+0.6
V
3
VI(Ratio)
0.71
1.4
-
4
II
-2
IOZ
-5
2
uA
5
uA
IOH
-16.8
mA
IOL
16.8
mA
IOH
-9
mA
IOL
9
mA
Note :
1. VREF is expected to be equal to 0.5*VDDQ of the transmitting device, and to track variations in the dc level of same. Peak-to peak noise on VREF may
not exceed +/-2% of the dc value.
2. V_TT is not applied directly to the device. V_TT is a system supply for signal termination resistors, is expected to be set equal to VREF, and must track vari-
ations in the DC level of VREF
3. VID is the magnitude of the difference between the input level on CK and the input level on CK.
4. The ratio of the pullup current to the pulldown current is specified for the same temperature and voltage, over the entire temperature and voltage range,
for device drain to source voltages from 0.25V to 1.0V. For a given output, it represents the maximum difference between pullup and pulldown drivers
due to process variation. The full variation in the ratio of the maximum to minimum pullup and pulldown current will not exceed 1.7 for device drain to
source voltages from 0.1 to 1.0.
Rev. 1.1 January 2007