S5L9250B Datasheet, PDF(1/163 Page) Samsung semiconductor – The CD-ROM 48X 1 chip receives the input signal read from the CD-DA/VIDEO-CD/CD-ROM disc after handling by the RF amplifier.

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S5L9250B Datasheet, PDF (1/163 Pages) Samsung semiconductor – The CD-ROM 48X 1 chip receives the input signal read from the CD-DA/VIDEO-CD/CD-ROM disc after handling by the RF amplifier.

DATA SHEET

S5L9250B

INTRODUCTION

The CD-ROM 48X 1 chip receives the input signal read from the CD-DA/VIDEO-CD/CD-ROM disc after handling

by the RF amplifier. The signal is input into the digital servo block which has a built-in DSP core, and goes

through focus and tracking adjustments. The RF signal input into a data path goes through the data slicer, PLL,

EFM demodulator, C1/C2 ECC and the audio handling block. In the case of a CD-DA, the signal is output through

the 1-bit DAC. In the case of a CD-ROM, the signal is input into an external CD-ROM controller for handling, then

transmitted to the host through the ATAPI I/F. Also, if you operate the CD-DA in audio buffering mode while

already in CAV mode, the signal is stored in the CD-ROM controller DRAM at high speed, then output at 1x from

the CD-ROM controller, after passing through the 1-bit DAC built-in to the S5L9250B.

FEATURES

â¢ Main Features

ï£§ Digital servo, CD-DSP, 1-bit DAC.

ï£§ 33.8688MHz crystal.

ï£§ Supports CLV 4X and 8X.

ï£§ Supports CAV MAX 16X, 20X, 24X, 32X, 40X, and 48X.

ï£§ Interrupt (SINTB)

ï£§ MICOM interface

â¢ Digital Servo Block

ï£§ Automatic adjusting feature (focus/tracking loop offset, balance, loop gain)

ï£§ Built-in AGC feature that adapts to work optimally with various disc types

ï£§ Built-in search algorithm for speed control

ï£§ Servo monitor signal generation (FOK, MIRROR, TZC, ANTI-SHOCK)

ï£§ Various loop filter coefficient selection by MICOM

ï£§ Built-in algorithm for handling defects/shocks

ï£§ Disc discriminating data out (FEpk, SBADpk)

ï£§ RF IC and serial interface

ï£§ Built-in 10-bit DAC (Focus/Tracking/SLD)

ï£§ OAK DSP core

â¢ CD Digital Signal Processing Block

ï£§ Wide capture range analog PLL

ï£§ Data Slicer using duty feedback method

ï£§ EFM demodulation

ï£§ Sync detection, protection, insertion

ï£§ CLV, CAV disc spindle motor control

ï£§ C1/C2 ECC

ï£§ Built-in 16 K SRAM for ECC

ï£§ Subcode P - W handling feature

ï£§ CD-DA Audio handling feature

ï£§ SUB-Q De-interleaving & CRC check

ï£§ High speed data transmission support by CD-ROM decoder block for audio buffering (sync mode

selection

between subcode sync and CD-DA data)

ï£§ Digital audio out block

ï£§ Subcode sync. Insertion, Protection

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