S5C7212X01 Datasheet, PDF (1/19 Pages) Samsung semiconductor – TIMING & SYNC. GENERATOR FOR B/W CCD

TIMING & SYNC. GENERATOR FOR B/W CCD
S5C7212X01
INTRODUCTION
The S5C7212X01 is a CMOS integrated circuit designed for making various
timing pulses for B/W CCD camera.
48-QFP-0707
FEATURES
ORDERING INFORMATION
• Compatible with both EIA and CCIR mode
( EIA : S5F325NW02 / S5F325NU02
CCIR : S5F329PW02 / S5F329PU02 )
• Built in auto iris function (Electronic Exposure)
• Mirror mode timing generation
• Field interlace mode only
• Timing and sync one chip IC
• Oscillation frequency
EIA : 19.06992MHz, CCIR : 18.93750MHz
Device
S5C7212X01-E0R0
Package
48-QFP-0707
Operating
-20 °C − 75 °C
APPLICATION
• B/W CCD Camera
BLOCK DIAGRAM
38 37 36 35
33 30 29 28 27 26 25 24
CL ₄₃
X2 41
X1 40
TS2 45
TS1 46
TS0 47
PWR 48
1/2
GATE1
1/606
1/525
or
1/625
High/Low
Control
Shutter
Speed
ROM
Horizontal
ROM
Vertical
ROM
Shutter
Speed
Count
F/F
GATE2
F/F
Shutter
Speed
Control
1 234
7 8 9 10 11 12
22 _SHP
21 _SHD
18 CLP1
17 CLP2
16 CLP3
15 DFDO
14 CLEN
13 WIN
1