KM68B261A Datasheet, PDF (1/7 Pages) Samsung semiconductor – 32K x 8 Bit High-Speed BiCMOS Static RAM

KM68B261A
BiCMOS SRAM
32K x 8 Bit High-Speed BiCMOS Static RAM
FEATURES
• Fast Access Time 6,7,8ns(Max.)
• Low Power Dissipation
Standby (TTL) : 110 mA(Max.)
(CMOS) : 20 mA(Max.)
Operating Current : 170 mA(f=100MHz)
• Single 5V ± 5% Power Supply
• TTL Compatible Inputs and Outputs
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• Center Power/Ground Pin Configuration
• Standard Pin Configuration
KM68B261AJ : 32-SOJ-300
GENERAL DESCRIPTION
The KM68B261A is a 262,144-bit high-speed Static
Random Access Memory organized as 32,768 words by
8 bits. The KM68B261A uses eight common input and
output lines and has an output enable pin which
operates faster than address access time at read cycle.
The device is fabricated using Samsung`s advanced
BiCMOS process and designed for high-speed system
applications. It is particularly well suited for use in high-
density high-speed system applications. The
KM68B261A is packaged in a 300 mil 32-pin plastic
SOJ.
FUNCTIONAL BLOCK DIAGRAM
Pre-Charge Circuit
A0
A1
A2
A3
A4
A5
A6
I/O1-I/O8
MEMORY ARRAY
128 Rows
256x8 Columns
Data
Cont.
I/O Circuit
Column Select
PIN CONFIGURATION(TOP VIEW)
A0 1
A1 2
A2 3
A3 4
/CS 5
I/O1 6
I/O2 7
Vcc 8
Vss 9
I/O3 10
I/O4 11
/WE 12
A4 13
A5 14
A6 15
A7 16
SOJ
32 N.C
31 A14
30 A13
29 A12
28 /OE
27 I/O8
26 I/O7
25 Vss
24 Vcc
23 I/O6
22 I/O5
21 A11
20 A10
19 A9
18 A8
17 N.C
A7 A8 A9 A10 A11 A12 A13 A14
PIN DESCRIPTION
Pin Name
Pin Function
/CS
A0-A14
Address Inputs
/WE
/WE
Write Enable
/CS
Chip Select
/OE
/OE
Output Enable
I/O1-I/O8
Data Inputs/Outputs
Vcc
Power (5V)
Vss
Ground
N.C
No Connection
1
Rev 2.0
October-1994