KM681000B Datasheet, PDF (1/11 Pages) Samsung semiconductor – 128K x8 bit Low Power CMOS Static RAM

KM681000B Family
PRELIMINARY
CMOS SRAM
128K x8 bit Low Power CMOS Static RAM
FEATURES
¡Ü Process Technology : 0.6§- CMOS
¡Ü Organization : 128Kx8
¡Ü Power Supply Voltage : Single 5.0V ¡¾ 10%
¡Ü Low Data Retention Voltage : 2V(Min)
¡Ü Three state output and TTL Compatible
¡Ü Package Type : JEDEC Standard
32-DIP, 32-SOP, 32-TSOP I R/F
GENERAL DESCRIPTION
The KM681000B family is fabricated by SAMSUNG's advanced
CMOS process technology. The family can support various
operating temperature ranges and have various package types
for user flexibility of system design. The family also support low
data retention voltage for battery back-up operation with low
data retention current.
PRODUCT FAMILY
Product
Family
Operating
Temperature
KM681000BL
KM681000BL-L
KM681000BLE
KM681000BLE-L
KM681000BLI
KM681000BLI-L
Commercial(0~7¡É)
Extended(-25~85¡É)
Industrial(-40~85¡É)
Speed
PKG Type
55/70ns
70/100ns
70/100ns
32-DIP,32-SOP
32-TSOP I R/F
32-SOP
32-TSOP I R/F
32-SOP
32-TSOP I R/F
Power Dissipation
Standby
(ISB1, Max)
Operating
(ICC2)
100§Ë
20§Ë
100§Ë
50§Ë
100§Ë
50§Ë
70mA
PIN DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
A11
1
A9
2
A8
3
A13
4
WE
5
N.C
1
A16
2
32
VCC
CS2
6
A15
7
31
A15
VCC
8
A14
3
30
CS2
NC
9
A16
10
A12
4
29
WE
A14
11
A7
5
28
A13
A12
12
A7
13
A6
6
A5
7
32-DIP
27
A8
26
A9
A6
14
A5
15
A4
16
A4 8 32-SOP 25 A11
A3
9
24
OE
A2
10
A1
11
A0
12
I/O1
13
I/O2
14
I/O3
15
VSS
16
23
A10
22
CS1
A4
16
A5
15
21
I/O8
A6
14
A7
13
20
I/O7
A12
12
A14
11
19
I/O6
A16
10
18
I/O5
NC
9
VCC
8
17
I/O4
A15
7
CS2
6
WE
5
A13
4
A8
3
A9
2
A11
1
32-TSOP
Type I - Forward
32
OE
31
A10
30
CS1
29
I/O8
28
I/O7
27
I/O6
26
I/O5
25
I/O4
24
VSS
23
I/O3
22
I/O2
21
I/O1
20
A0
19
A1
18
A2
17
A3
32-TSOP
Type I-Reverse
17
A3
18
A2
19
A1
20
A0
21
I/O1
22
I/O2
23
I/O3
24
VSS
25
I/O4
26
I/O5
27
I/O6
28
I/O7
29
I/O8
30
CS1
31
A10
32
OE
A0~3, A8~11
A4~7,
A12~16
I/O1~8
Name
A0~A16
WE
CS1,CS2
OE
I/O1~I/O18
Vcc
Vss
N.C
Y-Decoder
Cell
Array
I/O Buffer
Function
Address Inputs
Write Enable Input
Chip Select Inputs
Output Enable Input
Data Inputs/Outputs
Power
Ground
No Connection
CS1,CS2
WE,OE
Revision 0.3
April 1996