KM416S4030C Datasheet, PDF (1/11 Pages) Samsung semiconductor – 1M x 16Bit x 4 Banks Synchronous DRAM

KM416S4030C
Revision History
Revision 1 (May 1998)
- ICC2N value (10mA) is changed to 12mA.
Revision .2 (June 1998)
- tSH (-10 binning) is revised.
Preliminary
CMOS SDRAM
REV. 2 June '98