K9K2G08U1A Datasheet, PDF (1/37 Pages) Samsung semiconductor – 128M x 8 Bit / 256M x 8 Bit NAND Flash Memory

K9F1G08R0A
K9F1G08U0A K9K2G08U1A
Document Title
128M x 8 Bit / 256M x 8 Bit NAND Flash Memory
FLASH MEMORY
Revision History
Revision No History
0.0
1. Initial issue
0.1
1. The tADL(Address to Data Loading Time) is added.
- tADL Minimum 100ns (Page 11, 23~26)
- tADL is the time from the WE rising edge of final address cycle
to the WE rising edge of first data cycle at program operation.
2. Added Addressing method for program operation
0.2
1. Add the Protrusion/Burr value in WSOP1 PKG Diagram.
0.3
1. PKG(TSOP1, WSOP1) Dimension Change
0.4
1. Technical note is changed
2. Notes of AC timing characteristics are added
3. The description of Copy-back program is changed
4. Voltage range is changed
-1.7V~1.95V -> 1.65V~1.95V
5. Note2 of Command Sets is added
0.5
1. CE access time : 23ns->35ns (p.11)
0.6
1. The value of tREA for 3.3V device is changed.(18ns->20ns)
2. EDO mode is added.
0.7
1. The flow chart to creat the initial invalid block table is cahnged.
Draft Date Remark
Aug. 24. 2003 Advance
Jan. 27. 2004 Preliminary
Apr. 23. 2004 Preliminary
May. 19. 2004 Preliminary
Jan. 21. 2005 Preliminary
Feb. 14. 2005 ^Preliminary
May. 24. 2005
May 6. 2005
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have
any questions, please contact the SAMSUNG branch office near your office.
1