K7A401800M Datasheet, PDF (1/15 Pages) Samsung semiconductor – 256Kx18 Synchronous SRAM

K7A401800M
256Kx18 Synchronous SRAM
Document Title
256Kx18-Bit Synchronous Pipelined Burst SRAM
Revision History
Rev. No. History
Draft Date
Remark
0.0
Initial draft
February. 02. 1998 ^Preliminary
0.1
Change DC characteristics VDD condition from VDD=3.3V+10%/-5% Change February. 12. 1998 Preliminary
Input/output leackage currant from ±1µA to ±2µA
Modify Read timing & Power down cycle timing.
Change ISB2 value from 30mA to 20mA.
Remove DC characteristics ISB1 - L ver. & ISB2 - L ver .
Remove Low power version.
0.2
Change Undershoot spec
from -3.0V(pulse width≤20ns) to -2.0V(pulse width≤tCYC/2)
Add Overshoot spec 4.6V((pulse width≤tCYC/2)
Change VIH max from 5.5V to VDD+0.5V
April. 14. 1998
Preliminary
0.3
Change ISB2 value from 20mA to 30mA.
May. 13. 1998
Change VDD condition from VDD=3.3V+10%/-5% to VDD=3.3V+0.3V/-0.165V.
Preliminary
0.4
Modify DC characteristics( Input Leakage Current test Conditions)
form VDD=VSS to VDD to Max.
May. 14.1998
Preliminary
1.0
Final spec Release
May. 15. 1998
Final
2.0
Add VDDQ Supply voltage( 3.3V I/O)
Mar. 31. 1999
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
March 1999
Rev 2.0