STUD428S Datasheet, PDF (1/9 Pages) SamHop Microelectronics Corp. – S uper high dense cell design for low R DS (ON).

S amHop Microelectronics C orp.
S T U/D428S
Mar.8,2007
N-C hannel Logic Level E nhancement Mode Field E ffect Transistor
P R ODUC T S UMMAR Y
VDS S
ID
R DS (ON) ( m Ω ) Typ
40V
50A
8 @ _{VGS = 10V}
10 @ VGS = 4.5V
F E AT UR E S
S uper high dense cell design for low R DS(ON).
R ugged and reliable.
S urface Mount P ackage.
E S D P rotected.
D
G
S
S TU S E R IE S
T O -252AA(D-P AK )
G
DS
S TD S E R IE S
TO-251(l-P AK)
D
G
S
ABS OLUTE MAXIMUM R ATINGS (Ta=25 C unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Symbol
Limit
Unit
VDS
40
V
VGS
20
V
Drain Current-Continuous @TC=25 C
ID
50
A
a
-Pulsed
IDM
100
A
Drain-Source Diode Forward Current
IS
20
A
Maximum Power Dissipation @Tc=25 C
PD
50
W
Operating and Storage Temperature Range _{TJ, TSTG}
-55 to 175
C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
R JC
3
C /W
Thermal Resistance, Junction-to-Ambient
R JA
50
C /W
1