STUD1530PL Datasheet, PDF (1/8 Pages) SamHop Microelectronics Corp. – S uper high dense cell design for low R DS (ON).

S amHop Microelectronics C orp.
S T U/D1530P L
P reliminary Mar.28 2004
P -C hannel E nhancement Mode MOS FE T
P R ODUC T S UMMAR Y
VDS S
ID
R DS (ON) ( m Ω ) Max
-30V -20A
45 @ VGS = -10V
60 @ VGS = -4.5V
F E AT UR E S
S uper high dense cell design for low R DS(ON).
R ugged and reliable.
TO-252 and TO-251 P ackage.
D
G
S
S DU S E R IE S
T O -252AA(D-P AK )
G
DS
S DD S E R IE S
TO-251(l-P AK)
D
G
S
ABS OLUTE MAXIMUM R ATINGS (TA=25 C unless otherwise noted)
P arameter
Drain-S ource Voltage
S ymbol
Limit
Unit
VDS
-30
V
Gate-S ource Voltage
VGS
20
V
Drain C urrent-C ontinuous ^a @ TJ=125 C
ID
-20
A
-P ulsed ^b
IDM
-50
A
Drain-S ource Diode Forward C urrent ^a
IS
-20
A
Maximum P ower Dissipation ^a
PD
50
W
Operating Junction and S torage
Temperature R ange
TJ, TSTG
-55 to 175
C
THE R MAL CHAR ACTE R IS TICS
Thermal R esistance, Junction-to-C ase
R JC
3
C /W
Thermal R esistance, Junction-to-Ambient
R JA
50
C /W
1