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SA2002P Datasheet, PDF (7/14 Pages) Sames – Programmable Single Phase Kilowatt-hour Energy IC for Mechanical Counter Application
SA2002P
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DEVICE CONFIGURATION
SIGNAL FLOW DESCRIPTION
The following is an overview of the SA2002P’s registers. For a
detailed description of each parameter please refer to
parameter description section.
Figure 8 shows the various registers in the SA2002P’s power
to pulse rate block. The input to this block is a single bit pulse
density modulated signal of 641454 pulses per second at rated
conditions. The parameters Cor, Ct, Kr, CresH, CresL, Pw,
Cled, Dc and Ds contain values which are read from the
external EEPROM during power up.
The divider registers, Pre-Divider and Rated Condition, are
used for gain calibration. The Creep current threshold register
is used to set the SA2002P’s creep threshold. The Rated
Condition register is also used to program the rated condition
of the meter and feeds the registers LED-constant and
Counter Resolution with the applicable pulse rate. These two
registers are programmed to select the LED output rate and
the counter resolution (pulses per kWh) respectively. The
Counter Pulse Width register is used to program the pulse
width for the mechanical counter driver output MOP and MON.
EEPROM Memory Allocation
The following table shows the EEPROM memory allocated as
well as the corresponding name. The uneven byte always
contains a XORed byte of the previous even byte. This is the
checksum byte used by the SA2002P to ensure data integrity.
Power from S - D converters
641454 pulses/s
Pre-Divider
÷Cor
Creep current
threshold
detector
Ct
Test Mode
Tm
AC/DC Mode
Dc
Metering Direction
Ds
Rated Condition
÷Kr
Counter
Resolution
CresH, CresL
Normally 1253p/s
Normally 6400p/kWh
LED-Constant
Cled
Counter Pulse
width
Pw
MOP MON
LED
Figure 8: Signal flow block diagram
Description
Pre-Divider
Creep current threshold
Metering direction select
DC or AC measurement mode
Rated Condition
Led Pulse-rate
Counter Resolution (LSB)
Counter Resolution (MSB)
Counter Pulse-Width
E2Address
12
13
14
14
14
15
16
17
18
19
20
21
22
22
23
Contents
Cor
XOR of ADDR 12
Ct
Ds
Dc
XOR of ADDR 14
Kr
XOR of ADDR 16
Cled
XOR of ADDR 18
CresL
XOR of ADDR 20
ClresH
Pw
XOR of ADDR 22
Bit [7:0]
---v vvvv
xxxx xxxx
---- ---v
---- -v--
---- v---
xxxx xxxx
vvvv vvvv
xxxx xxxx
---- --vv
xxxx xxxx
vvvv vvvv
xxxx xxxx
---v vvvv
vv-- ----
xxxx xxxx
KEY: (- = DON’T CARE); (V = VALUE/PARAMETER); (0,1 = LOGICAL VALUE); (X = BIT-XOR)
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Table 1: EEPROM memory allocation map
7/14
Name
D12
D14
D14
D14
D16
D18
D20
D22