BU97950FUV Datasheet, PDF (9/25 Pages) Rohm – Standard LCD Segment Drivers

BU97950FUV MAX 280 segments (SEG35×COM8)
●Detailed command description
D7 (MSB) is bit for command or data judgment.
For more detailed information, please refer to “Command and data transfer method”.
C: 0: Next byte is RAM write data.
1: Next byte is command.
○Address set (ADSET)
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
C
0
P5 P4 P3 P2 P1 P0
Address data is specified in P[5:0].
The address range can be set as 000000 to 100010(bin) for Write mode.
When the specified address is out of range, the address will be set to “000000”.
The default value of the DDRAM address is “000000”
The address can be set 100011 (bin) and 100100 (bin) for Read mode.
It is prohibited to set other address.
P[5:0] = 23h （100011b） - REG1
Register address for Software reset condition and EVR setting
P[5:0] = 24h （100100b） - REG2
Register address for the other settings
(For more detailed information, please refer to “Read Command Register and Transfer Method”)
○EVR Set (EVRSET)
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
C
1
0 P4 P3 P2 P1 P0
It is able to control a 32-step electrical volume register (EVR).
It is able to set V0 voltage level (the max level voltage of LCD driving voltage).
Electrical volume register (EVR) is set to “00000” upon initialization..
In “00000” condition, V0 voltage outputs VLCD voltage.
Avoid setting EVR V0 voltage under 2.5V.
And ensure “VLCD – V0 > 0.6” condition is satisfied.
Unstable IC output voltage may result if the above conditions are not satisfied.
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08.Sep.2015 Rev.004