BU9831 Datasheet, PDF (8/13 Pages) Rohm – Non-volatile electronic potentiometer

Memory ICs
•^{Timing charts}
(1) Writing enabled / disabled
H
SK
1
4
L
H
CS
L
BU9831 / BU9831F
8
12
16
ENABLE = 1 1
DISABLE = 0 0
H
DIO
L
1 01 0 0 0
Fig. 11 Writing enabled and disabled
1) When the power supply is turned on, the writing recognition latch is reset in the same way as when the write dis-
able command is executed. The write enable command must be input before the write command is input.
2) Once the write enable command has been set, it remains effective until either the write disable command is input,
or the power supply is turned off.
3) No clocks longer than 16 clocks are required. These will be ignored by the IC if input. The command is received
following the clock input for the eight bits of the address subsequent to input of the operation code. The contents of
the address are not related to either of these commands, however, and will be ignored.
(2) Wiper counter data output (WCR)
H
SK
1
4
L
H
CS
L
8
16
24
t CS
H
DIO
L
(DO)
1 0 1 0 1 0 11
HIGH-Z
D8
D14
HIGH-Z
Fig. 12 Wiper counter data output
1) When the Wiper Counter Data Output (WCR) command is received, seven bits of the data at the current wiper
position are output to D8, D9, D10, ..., D14, in sequential order. If a clock of longer than 24 clocks is input, indefinite
data may be output. (For the DIO output, the data may change at the tPD0 and tPD1 time delays, in response to the
internal circuit delay starting from the falling edge of the SK signal. During the tPD0 and tPD1 time internals, data
should be loaded after the tPD time has been assured, in case the previous data is indefinite. Refer to Fig. 10,
Synchronous data I / O timing.)
8