BU97931FV Datasheet, PDF (8/32 Pages) Rohm – Multifunction LCD Segment Driver

BU97931FV MAX 112 segments (SEG28×COM4)
○Write display data and transfer method
This device has Display Data RAM (DDRAM) of 28×4=112bit.
The relationship between data input and display data, DDRAM data and address are as follows.
1st Byte 2nd Byte
Command Command Command
10000011 00000000 10100000 _{a b c d e f g h i j k l m n o p …}
Address set
RAM Write
Display RAM data
According to this command, an 8-bit binary data will be written to DDRAM. The starting address of the DDRAM where data
will be written is specified by “ADSET" command, and is automatically incremented after every 4 bits of data received.
Writing data to DDRAM can be done by continuously sending data.
(In case data is sent continuously after write date at 1Bh (SEG27), address return to address 00h (SEG0)
automatically.)
In case SEG port assigned to GPO port by OUTSET command, corresponding SEG address do not change and is used
as a dummy address.
DDRAM address
00
01
02
03
04
05
06
07
・・・ 19h 1Ah 1Bh
0a
e
i
m
1b
f
j
n
2c
g
k
o
BIT
3d
h
l
p
SEG SEG SEG SEG SEG SEG SEG SEG
0
1
2
3
4
5
6
7
・・・
SEG SEG SEG
25
26
27
Display data write to DDRAM every 4bits.
In case CSB changes from ”L” to ”H” before 4 bits of data transfer was finished, RAM write is cancelled.
COM0
COM1
COM2
COM3
CSB
SCL
SD
Internal
signal
RAM write
CSB
SCL
SD
Internal
signal
RAM write
1st byte Command / 2nd byte Command
Command
Display data
Address set command
RAMWR command
1st byte Command / 2nd byte Command
Command
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
Address 00h
Address 01h
Address 02h
RAM write every 4bit
data lower than 4bit case
RAM write is canceled
Display data
Address set command
RAMWR command
D7 D6 D5 D4 D3 D2 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4
Address 00h
Address 30h
Figure 8. Display Data Transfer Method
Address 31h
Addres00h
Auto increment
Return to address 00h
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10.Apr.2015 Rev.004