BU4S66G2_15 Datasheet, PDF (8/16 Pages) Rohm – Single Analog Switch

BU4S66G2
Power Dissipation
Power dissipation (total loss) indicates the power that can be consumed by IC at TA=25°C(normal temperature). IC is
heated when it consumed power, and the temperature of IC chip becomes higher than ambient temperature. The
temperature that can be accepted by IC chip depends on circuit configuration, manufacturing process, and consumable
power is limited. Power dissipation is determined by the temperature allowed in IC chip(maximum junction temperature) and
thermal resistance of package(heat dissipation capability). The maximum junction temperature is typically equal to the
maximum value in the storage temperature range. Heat generated by consumed power of IC radiates from the mold resin
or lead frame of the package. The parameter which indicates this heat dissipation capability(hardness of heat release)is
called thermal resistance, represented by the symbol θJA (°C/W).The temperature of IC inside the package can be
estimated by this thermal resistance. Figure 18 shows the model of thermal resistance of the package. Thermal resistance
θJA, ambient temperature TA, maximum junction temperature TJmax, and power dissipation PD can be calculated by the
equation below:
θJA = (TJmax - TA) / PD (°C/W)
Derating curve in Figure 19 indicates power that can be consumed by IC with reference to ambient temperature. Power that
can be consumed by IC begins to attenuate at certain ambient temperature. This gradient is determined by thermal
resistance θJA. Thermal resistance θJA depends on chip size, power consumption, package, ambient temperature, package
condition, wind velocity, etc even when the same of package is used. Thermal reduction curve indicates a reference value
measured at a specified condition.
θJA =( TJmax - TA)/ PD (°C/W)
Ambien周t t囲em温p度eraTtaur[℃e ]TA (°C)
Chip
surface
チ ップ
表^tem面^p温^e度^ratuT^rj ^e[℃^T]^J(°C)
消費電力 P [W]
Figure 18. Thermal Resistance
I/O Equivalent Circuits
Pin No.
Control Input Terminals
4
VDD
VDD
1.0
0.8
0.6
0.4
0.2
0.0
0
85
25 50 75 100 125 150
A^Am^mb^bie^ienⁿt ^tTe^Tm^empe^pr^eat^ru^ar^te^ur[^e°C^[]^℃]
Figure 19. Derating Curve
Input/Output Terminals
1,2
VDD
VDD
Equivalent
Circuit
VSS
VSS
VSS
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TSZ22111 • 15 • 001
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TSZ02201-0RDR0GZ00270-1-2
30.Sep.2015 Rev.002