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BU95101 Datasheet, PDF (7/15 Pages) Rohm – Drivers for Large LCD Panels
BU95101
Technical Note
●Pin descriptions
Pin Name
D00P/N ~ D02P/N
D10P/N ~ D12P/N
D20P/N ~ D22P/N
CLKP/N
In/Out
In
In
Active
Differential
Descriptions
RSDS input terminals of display data
The 3-bit differential input pairs generate the internal 6-bit data through the
comparison between DXXP and DXXN.
Differential
The RSDS clock input pair generate the internal shift clock through the
comparison between CLKP and CLKN.
Y1 ~ Y384
R/L
SFTR
SFTL
STB
INV
V1 ~ V10
POL
IREP1,2
Out
In
In/Out
In/Out
In
In
In
In
In
-
Driver outputs for D/A converted 64 gray scale analog voltage.
The shift direction of internal shift register is controlled by this pin as shown below.
-
R/L=H : Right shift SFTR→Y1→Y384→SFTL
R/L=L : Left shift SFTL→Y384→Y1→SFTR
H
SFTR=H:Right shift start pulse input terminal in cascade connection.
SFTR=L:Carry output terminal in cascade connection.
H
SFTL=H:Carry output terminal in cascade connection.
SFTL=L:Left shift start pulse input terminal in cascade connection.
The data in the data register are transferred to the data latch at the rising edge
of STB, then the gray scale voltages are output from the buffer at the falling
edge of STB.
Terminal to specify inverting or non-inverting of display data
H
INV:H : Input data are inverted in the IC.
INV:L : Input data are not inverted.
-
Input for the γ-correction reference voltage
The following external reference voltages are input.
At the rising edge of STB, the state of POL are transferred to the driver.
POL=H : The reference voltage for odd number outputs are V1 to V5
-
and those for even number outputs are V6 to V10.
POL=L : The reference voltage for odd number outputs are V6 to V10
and those for even number outputs are V1 to V5
-
Repair amplifier input
OREP1,2
Out
-
Repair amplifier output
AVDD
In
-
Power supply for driver block
AVSS
In
-
Ground for AVDD
DVDD
In
-
Power supply for digital block
DVSS
In
-
Ground for DVDD
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2010.10 - Rev.A