BD6735FV_09 Datasheet, PDF (7/9 Pages) Rohm – 1 to 2ch Lens Drivers for Single-Lens Reflex Cameras

BD6735FV, BD6736FV
Technical Note
5) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
6) Pin short and wrong direction assembly of the device
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any
connection error or if positive and ground power supply terminals are reversed. The IC may also be damaged if pins are
shorted together or are shorted to other circuit’s power lines.
7) Actions in strong magnetic field
Use caution when using the IC in the presence of a strong magnetic field as doing so may cause the IC to malfunction.
8) ASO
When using the IC, set the output transistor for the motor so that it does not exceed absolute maximum ratings or ASO.
9) Thermal shutdown circuit
If the junction temperature (Tjmax) reaches 175°C (BD6735FV Typ.) and 160°C (BD6736FV Typ.), the TSD circuit will
operate, and the coil output circuit of the motor will open. There is a temperature hysteresis of approximately 20°C. The
TSD circuit is designed only to shut off the IC in order to prevent runaway thermal operation. It is not designed to protect
the IC or guarantee its operation. The performance of the IC’s characteristics is not guaranteed and it is recommended that
the device is replaced after the TSD is activated.
10) Testing on application board
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to, or
removing it from a jig or fixture, during the inspection process. Ground the IC during assembly steps as an antistatic
measure. Use similar precaution when transporting and storing the IC.
11) Application example
The application circuit is recommended for use. Make sure to confirm the adequacy of the characteristics. When using the
circuit with changes to the external circuit constants, make sure to leave an adequate margin for external components
including static and transitional characteristics as well as dispersion of the IC.
12) Regarding input pin of the IC
This monolithic IC contains P⁺ isolation and P substrate layers between adjacent elements to keep them isolated. P-N
junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or
transistor. For example, the relation between each potential is as follows:
When GND > Pin A, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic diode and transistor.
Parasitic elements can occur inevitably in the structure of the IC. The operation of parasitic elements can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic elements
operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used.
Pin A
Resistor
Pin A
Pin B
C
B
E
Transistor (NPN)
Pin B
N
N ^P+
Parasitic element
P
P⁺ _N
P substrate
GND
Parasitic
element
N _P+
N
P
P⁺ _N
P substrate
Parasitic element
GND
Fig.12 Example of Simple IC Architecture
GND
B
C
Other adjacent
elements
E
Parasitic
element
GND
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2009.06 - Rev.A