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BD3509MUV_10 Datasheet, PDF (7/21 Pages) Rohm – Nch FET Ultra LDO for PC Chipsets
◁
BD3508MUV,BD3509MUV
●Reference Data
BD3509MUV
Vo
50mV/div
39mV
Io
2A/div
4.0A
Vo
50mV/div
51mV
Io
2A/div
4.0A
Io=0A→4A/4µsec t(10µsec/div)
Fig.25 Transient Response
(0→4A)
Co=22µF,CFB=0.01µF
Io=0A→4A/4µsec t(10µsec/div)
Fig.26 Transient Response
(0→4A)
Co=100µF
37mV
Vo
50mV/div
Vo
50mV/div
41mV
Technical Note
Vo
100mV/div
41mV
Io
2A/div
4.0A
Io=0A→4A/4µsec
t(10µsec/div)
Fig.27 Transient Response
(0→4A)
Co=47µF,CFB=0.01µF
Vo
50mV/div
39mV
Io
2A/div
4.0A
Io
2A/div
4.0A
Io=4A→0A/4µsec t(100µsec/div)
Fig.28 Transient Response
(4→0A)
Co=22µF, CFB=0.01µF
Io=4A→0A/4µsec t(100µsec/div)
Fig.29 Transient Response
(4→0A)
Co=100µF
VEN
2V/div
VEN
2V/div
VNRCS
1V/div
Vo
1V/div
VNRCS
1V/div
Vo
1V/div
PGOOD
2V/div
t(200µsec/div)
PGOOD
2V/div
t(2msec/div)
Fig.31: Waveform at output start
Fig.32 Waveform at output
OFF
Io
2A/div
4.0A
Io=4A→0A/4µsec t(100µsec/div)
Fig.30 Transient Response
(4→0A)
Co=47µF, CFB=0.01µF
VEN
VCC
VIN
Vo
VCC→VIN→VEN
Fig.33 Input sequence
VEN
VCC
VIN
Vo
VIN→VCC→VEN
Fig.34 Input sequence
VEN
VCC
VIN
Vo
VEN→VCC→VIN
Fig.35 Input sequence
VEN
VCC
VIN
Vo
VCC→VEN→VIN
Fig.36 Input sequence
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7/20
2010.04 - Rev.C
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