BU8254GUW Datasheet, PDF (5/21 Pages) Rohm – 35bit LVDS Transmitter

BU8254GUW
●Pin Description
Technical Note
Table 1 : Pin Description
Pin Name
Pin No.
Type
Descriptions
TAP, TAN
A3,A2
LVDS OUT
TBP, TBN
A4,B3
LVDS OUT
TCP, TCN
B5,A5
LVDS OUT
LVDS data out.
TDP, TDN
B7,A7
LVDS OUT
TEP, TEN
B8,A8
LVDS OUT
TCLKP, TCLKN
B6,A6
LVDS OUT
LVDS clock out.
TA0～TA6
D3,D2,D4,E3,E2,D1,E5
IN
TB0～TB6
E1,F2,F1,F4,G1,G4,J2
IN
TC0～TC6
K2,K3,J4,K4,H5,K5,J6
IN
Pixel data inputs.
TD0～TD6 K6,K7,J8,K8,J9,H10,G10
IN
TE0～TE6
XRST
G7,F8,F9,F6,F10,E8,D7
E7
RS
F3
RF
VDD
J7
F7,J3
IN
IN
IN
IN
Power
H : Normal operation,
L : Power down (all outputs are Hi-Z)
LVDS swing mode, VREF ^*1select.
RS
LVDS
Swing
VDD
0.6～1.4V
350mV
350mV
GND
200mV
*1 VREF is Input Reference Voltage.
Small Swing
Input Support
N/A
RS-VREF
N/A
Input clock triggering edge select.
H : Rising edge, L : Falling edge.
Power supply pins for LVCMOS inputs and digital core.
CLKIN
E10
IN
Clock input.
GND
E4,E9,G3,G9,J5
Ground Ground pins for LVCMOS inputs and digital core.
LVDS VDD
B4
Power Power supply pins for LVDS outputs.
LVDS GND
C3,C4,C7
Ground Ground pins for LVDS outputs.
PLLVDD
C9
Power Power supply pin for PLL core.
PLLGND
C10
Ground Ground pins for PLL core.
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2013.06 - Rev.B