BR24G512-3A_14 Datasheet, PDF (5/34 Pages) Rohm – I2C BUS EEPROM (2-Wire)

BR24G512-3A
Block Diagram
A0 1
A1 2
512Kbit EEPROM Array
8bit
Address _16bit
Decoder
Word
Address Register
Data
Register
A2 3
GND 4
START
Control Circuit
STOP
ACK
High Voltage
Generating Circuit
Power Source
Voltage Detection
Figure 3. Block Diagram
8 VCC
7 WP
6 SCL
5 SDA
Datasheet
Pin Configuration
(TOP VIEW)
A0 ₁₁
8₁ VCC
A1
2₁
BR24G512-3A
7₁ ^WP
A2 ₃₁
6₁ ^SCL
GND ₄₁
5₁ SDA
Pin Descriptions
Terminal
Name
A0
Input/
Output
Descriptions
Input Slave address setting*
A1
Input Slave address setting*
A2
Input Slave address setting*
GND
SDA
SCL
-
Reference voltage of all input / output, 0V
Input/
Output
Serial data input serial data output
Input Serial clock input
WP
Input Write protect terminal
VCC
-
Connect the power source
*A0,A1 and A2 are not allowed to use as open.
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TSZ22111・15・001
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TSZ02201-0R2R0G100360-1-2
24.May.2014 Rev.004