BU8732AKV Datasheet, PDF (4/11 Pages) Rohm – CODEC IC for digital mobile phone

Communication ICs
zPin descriptions
Pin No. Pin name
1
REXTDI
2
REXTDO
3
EXTO
4
RIN
5
AUDO
6
AUDVR
7
ERPN
8
ERPO
9
SPPN
10
SPPO
11
SPCOP
12
SPCON
13
RXVSS
14
EARO
15
RXVDD
16
SMUTE
17
RXREF
18 CODCREF
19
REFC
20
TXREF
21
TXVSS
22
MIC1IP
23
MIC1IN
24
MIC1O
25
MIC2IN
26
MIC2O
27
TAUDO
28
TXVDD
29 TEXTADD
30
TEXTDI
31 TEXTDO
32
PLLLPF
33
FSYNC
34
STB
35
SCL
36
SDA
37 XPRSTB
38
DVSS
39
DVDD
40 PCMOUT
41
PCMIN
42
DCLK
∗1 Standard value
I/O
I/O
I/O
O
I
O
O
I
O
I
O
O
O
−
O
−
I
O
O
O
O
−
I
I
O
I
O
O
−
I
I/O
I/O
I/O
I
I
I/O
I/O
I
−
−
O
I
I
BU8732AKV
Terminal function
Input of the data signal of receive
Output of the data signal of receive
Amplifier output for the gain adjustment of receive signal
Direct input of the voice of receive
Direct output of receive signal
External output of receive signal
Inverted amplifier input for the earphone gain adjustment
Amplifier output for the earphone gain adjustment
Inverted amplifier input for the speaker gain adjustment
Amplifier output for the speaker gain adjustment
Non-ineverted speaker amplifier output for the receiver
Inverted speaker amplifier output for the receiver
Analog grounding for the receive
Speaker amplifier output for the earphone
Analog power source for the receive
Time constant terminal for the soft mute setting
Analog reference voltage output for the receive
Analog reference voltage output for codec
Analog reference voltage output
Analog reference voltage output for the transmit
Analog grounding for the transmit
Non-inverted input of the microphone amplifier 1
Inverted input of the microphone amplifier 1
Output of microphone amplifier 1
Inverted input of the microphone amplifier 2
Output of microphone amplifier 2 output
External output of transmit signal
Analog power source for the transmit
Additive input of the transmit signal
Input of the data signal of transmit
Output of the data signal of transmit
Filter connection input/output for PLL
PLL reference clock input
Strobe input for CPU I/F
Shift clock input for CPU I/F
Address data input for CPU I/F
System reset input (L: reset)
Grounding for digital
Power supply for digital
Output of PCM signal
Input of PCM signal
Shift clock input for PCM signal
Minimum load Maximum load
resistance[Ω] capacitance[F]
−
−
−
−
600
−
−
−
50k
50p
50k
50p
−
−
50k
50p
−
−
50k
50p
30(BTL)
−
30(BTL)
−
−
−
30
−
−
−
−
0.22µ^∗1
−
1µ^∗1
−
1µ^∗1
−
2.2µ^∗1
−
1µ^∗1
−
−
−
−
−
−
50k
50p
−
−
50k
50p
50k
50p
−
−
−
−
−
−
−
−
−
0.01µ^∗1
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
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