BU4S11G2_15 Datasheet, PDF (4/16 Pages) Rohm – Single 2-Input NAND Gate

BU4S11G2
Test Circuits
1.V_IH
VDD
V_IH
2.V_IL
+
I_OUT V V_OUT
V_IL
VDD
+
I_OUT V ^V_OUT
3.V_OH
VDD
V_IN
4.V_OL
+
I_OUT V V_OH
V_IN
VDD
+
I_OUT V V_OL
5.I_OH
VDD
6.I_OL
VDD
V_IN
A
+
I_OH
V_IN
A
+
I_OL
V _OH
V_OL
7. tTLH, tTHL, tPLH, tPHL
VDD
INPUT
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TSZ22111 • 15 • 001
20 ns
20 ns
OUTPUT
CL=50pF
INPUT
90%
50%
10%
t_PHL
t_PLH
OUTPUT
90%
50%
10 %
t_THL
t_TLH
Description of Symbols
tPHL : Time from 50% of the rise edge of input waveform to 50% of
the fall edge of output waveform
tPLH : Time from 50% of the fall edge of input waveform to 50% of
the rise edge of output waveform
tTHL : Time from 90% to 10% of fall edge of output waveform
tTLH : Time from 10% to 90% of rise edge of output waveform
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TSZ02201-0RDR0GZ00170-1-2
30.Sep.2015 Rev.002