BU21025GUL Datasheet, PDF (4/19 Pages) Rohm – 4-wire Resistive Touch Screen Controller

BU21025GUL
Datasheet
●2-wire Serial Interface
BU21025GUL supports a 2-wire serial interface A device that controls transfer is called a master. A device that controlled by
the master is called a slave. BU21025GUL is a slave device.
BU21025GUL has a write protocol and a read protocol. The write protocol consists of a start condition, an address byte, a
command byte, and a stop condition. The read protocol consists of a start condition, an address byte, one or two data bytes,
and a stop condition.
Start Condition
BU21025GUL recognizes as a start condition that falling edge of SDA while SCL is set “H”. If the start condition is received,
BU21025GUL will be in the state that can be transfer and received data. When the start condition is fulfilled, BU21025GUL
recognize the (repeated) start condition also in data transfer.
Stop Condition
BU21025GUL recognizes as a stop condition that rising edge of SDA while SCL is set “H”. If the stop condition is received,
BU21025GUL will be in the state that can not be transfer and received data.
Data Transfer
Data is transferred with the most significant bit (MSB) first and 8-bits long. Each byte has to be followed by an acknowledge
bit. A Timing of SDA data receiving is rising edge of SCL. A state of SDA can only change when SCL set to “L”. If SDA is
changed while SCL is set “H”, a start or stop condition will recognized by BU21025GUL.
Acknowledge Bit (sending)
After the master sends a byte to BU21025GUL, an acknowledge bit is used in order that BU21025GUL may return a
response to the master. At this time, the master needs to set SDA into a high impedance state. When BU21025GUL
receives effectively data, it sets SDA to “L” (ACK). Otherwise SDA is set to “H” (NACK).
Acknowledge Bit (receiving)
After the master receives a byte from BU21025GUL, an acknowledge bit is used for judgment of whether BU21025GUL
continues data transfer. In this case, the master needs to set SDA. When SDA is set to “L” (ACK), BU21025GUL continues
data transfer. When SDA is set to “H” (NACK), BU21025GUL ends data transfer.
Address Byte
BU21025GUL recognizes one byte data as an address byte after a start condition. The address byte is consisted a 7-bit
slave address and a read-write bit. If a received slave address is matched with its one, BU21025GUL issues an
acknowledge to the master. Otherwise BU21025GUL doesn’t issue an acknowledge to the master and stops data transfer.
Upper 5 bits of the 7-bit slave address are “10010”. And lower 2 bits of the 7-bit slave address are programmable by AD1
and AD0. The read-write bit (R/WB) determines direction. When it is ‘1’, the master reads from BU21025GUL. When it is ‘0’,
the master writes to BU21025GUL.
BIT
NAME
SLAVE
MSB
7
6
S6
S5
1
0
Table 1. Address Byte
5
4
3
S4
S3
S2
0
1
0
LSB
2
1
0
S1
S0
R/WB
AD1
AD0
-
BIT 7-1 : S6-0
Slave address
BIT 0 : R/WB
0: The master writes to BU21025GUL
1: The master reads from BU21025GUL.
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