BD9B500MUV Datasheet, PDF (4/34 Pages) Rohm – Integrated MOSFET Single Synchronous Buck DC/DC Converter

BD9B500MUV
Description of Block(s)
● VREF
The VREF block generates the internal reference voltage.
● UVLO
The UVLO block is for Under Voltage Lockout protection. It will shut down the IC when VIN falls to 2.45V (Typ) or
lower. The threshold voltage has a hysteresis of 100mV (Typ).
● TSD
The TSD block is for thermal protection. The thermal protection circuit shuts down the device when the internal
temperature of IC rises to 175°C (Typ) or higher. Thermal protection circuit resets when the temperature falls. The
circuit has a hysteresis of 25°C (Typ).
● Soft Start
The Soft Start circuit slows down the rise of output voltage during start-up and controls the current, which allows the
prevention of output voltage overshoot and inrush current. A built-in soft start function is provided and a soft start is
initiated in 1msec (Typ) when the SS terminal is open.
● Control Logic + DRV
This block is a DC/DC driver. A signal from On Time is applied to drive the MOSFETs.
● PGOOD
When the FB terminal voltage reaches more than 80% of 0.8V, the Nch MOSFET of the built-in open drain output
turns off and the output turns High.
● HOCP/LOCP/SCP
After soft start is completed and in condition where output voltage is below 70% (Typ) of voltage setting, it counts the
number of times of which current flowing in High side FET or Low side FET reaches over current limit. When 512
times is counted it stops operation for 1msec (Typ) and re-operates. Counting is reset when output voltage is above
80% (Typ) of voltage setting or when EN, UVLO, SCP function is re-operated.
● Error Amplifier
Adjusts Main Comparator input to make internal reference voltage equal to FB terminal voltage.
● Main Comparator
Main comparator compares Error Amplifier output and FB terminal voltage. When FB terminal voltage becomes low it
outputs High and reports to the On Time block that the output voltage has dropped below control voltage.
● On Time
This is a block which creates On Time. Desired On Time is created when Main Comparator output becomes High.
On Time is adjusted to restrict frequency change even with I/O voltage change.
www.rohm.com
© 2016 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
4/30
TSZ02201-0J3J0AJ01280-1-2
25.May.2016 Rev.001