BD9241F Datasheet, PDF (4/5 Pages) Rohm – Silicon Monolithic Integrated Circuit

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〇Usage notes
1. About the absolute maximum ratings
The damage may occur If absolute maximum rating such as applied voltage and operating temperature range etc. is exceeded,
moreover such destructive conditions as short mode or open mode etc. can not be assumed, so If a particular mode such as exceeding
the absolute maximum rating is assumed, please consider taking physical safety measures such as fuse etc.
2. As long as being operation range, the operation of circuit function will be assured in the range of operating ambient temperature. About
characteristic value, the specification value of electric characteristic can’t be guaranteed, but the characteristic value doesn’t change
rapidly in these ranges.
3. When attaching to the printed substrate, pay special attention to the direction and proper placement of the IC. If the IC is attached
incorrectly, it may be destroyed. Destruction can also occur when there is a short, which can be caused by foreign objects entering between
outputs or an output and the power GND.
4. Please be careful that there is a possibility of malfunction which is happening when you use it in a strong electromagnetic field.
5. The potential of GND terminal and PGND terminal is used with not over ±0.3V please.
6. This IC has a built-in Temperature Protection Circuit (TSD circuit). The temperature protection circuit (TSD circuit) is only to cut off the IC from
thermal runaway, and has not been designed to protect or compensate the IC. Therefore, the user should not plan to activate this circuit with
continued operation in mind.
7. Although the quality of this product has been tightly controlled ，the damage may occur If absolute maximum rating such as applied voltage
and operating temperature range etc. is exceeded, moreover such destructive conditions as short mode or open mode etc. can not be
assumed, so If a particular mode such as exceeding the absolute maximum rating is assumed, please consider taking a measures such as
fuse etc.
8. Regarding the external FET, since gate voltage will be changed regarding parasitic capacity between drain gates while switching the drain
voltage, please think over dispersion etc of our company’s IC, please select FET with sufficient margin.
9. CP timer does not operate during the time of soft start.
10．To prevent the destruction from external static electricity, please give resistance to the pin which directly link with connector etc.
11．This IC is a monolithic IC, and between each element there is a P+ isolation and P substrate for element separation. There is a P-N junction
and other parasitic elements formed between this P-layer and each element’s N-layer, as shown in Fig. when the resistors and transistors are
connected to the terminal，
○ When GND>(terminal A) at the resistance, or GND>(terminal B) at the transistor (NPN), the P-N junction operates as a
parasitic diode.
○ Also, when GND>(terminal B) at the transistor, a parasitic NPN transistor operates by the N-layer of other elements which
close to the aforementioned parasitic diode.
With the IC’s configuration, the production of parasitic elements by the relationships of the electrical potentials is inevitable. The
operation of the parasitic elements can also interfere with the circuit operation, leading to malfunction and even destruction. Therefore,
uses which cause the parasitic elements to operate, such as applying voltage to the input terminal which is lower than the GND
(P-substrate), should be avoided.
(Te(r端 mina子l A)Ａ)
抵抗
Resistance
(端子Ｂ)
Terminal B
トラ_Traン _nsisジ _{tor (}ス _NPNタ₎ （ＮＰＮ）
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Ｐ基板 ^{P Substrate}
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Parasitic Element
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Ｐ基板 ^{P Substrate}
Paras寄itic 生 Elem素en子t
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Parasitic Element
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近接するほかの素子
other elements close to
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寄生素子
Parasitic Element
Fig.1 Simple Structure of Monolithic IC
図-1 モノリシックＩＣの簡易構造
REV. A