BU9798GUW Datasheet, PDF (3/5 Pages) Rohm – Silicon monolithic integrated circuits

3/4
○Oscillation Frequency Characteristics ( Ta=-30~75degree, VDD=1.8V~3.6V, VLCD=3.3V~5.5V, VSS=0 ; unless otherwise specified )
Parameter
Frame frequency 1
Symbol
MIN
Limit
TYP
MAX
Unit
fFR1
57.6
64
70.4
Hz
Condition
VDD=3.3V, Ta=25degree, fFR=64Hz setting
Frame frequency 2
fFR2
51.2
64
73.0
Hz
Frame frequency 3
fFR3
45.0
-
64
Hz
CLKIN input frequency
fCLK
-
2
4
MHz
VDD=2.5~3.6V fFR=64Hz setting
VDD=1.8~2.5V fFR=64Hz setting
○ Load regulation ( Ta=-30~75degree, VDD=1.8V~3.6V, VLCD=3.3V~5.5V, VSS=0 ; unless otherwise specified )
Parameter
Symbol
MIN
Limit
TYP
MAX
Unit
Condition
Output voltage 1
Vreg1
4.25
4.5
4.70
V
4.5V setting (VLCD=5.5V, Ta=-30~75degree)
Output voltage 2
Vreg2
4.38
4.5
4.62
V
4.5V setting (VLCD=5.5V, Ta=25degree)
Load Regulation (**)
⊿Vreg
-
-
0.3
V
Iout = -300uA
Caution : Please use regulator at “Regulator output voltage < VLCD – 0.5V”
** Internal regulator unit only.
○ MPU interface Characteristics ( Ta=-30~75degree, VDD=1.8V~3.6V, VLCD=3.3V~5.5V, VSS=0 )
Parameter
Symbol
MIN
Limit
TYP
MAX
Unit
Input rise time
tr
-
-
50
ns
Input fall time
tf
-
-
50
ns
SCL cycle time
tSCYC
250
-
-
ns
“H” SCL pulse width
“L” SCL pulse width
tSHW
50
-
tSLW
50
-
-
ns
-
ns
SD setup time
tSDS
50
-
-
ns
SD hold time
CSB setup time
tSDH
50
-
tCSS
50
-
-
ns
-
ns
CSB hold time
tCSH
50
-
-
ns
“H” CSB pulse width
tCHW
50
-
-
ns
Condition
○ Terminal number/name
A1
CSB
B1 (NC) C1 VSS1 D1 VLCD E1 COM2 F1 SEG0 G1 SEG2 H1 SEG4
A2 PWMOUT B2 CLKIN C2 SDA D2 VDD E2 COM0 F2 SEG1 G2 SEG3 H2 SEG5
A3 SEG48 B3 VSS2 C3 SCL D3 INHB E3 COM1 F3 SEG6 G3 SEG7 H3 SEG9
A4 SEG46 B4 SEG44 C4 SEG45 D4 SEG47 E4 COM F4 SEG10 G4 SEG8 H4 SEG11
3
A5 SEG43 B5 SEG40 C5 SEG42 D5 SEG31 E5 SEG15 F5 SEG13 G5 SEG12 H5 SEG14
A6 SEG41 B6 SEG39 C6 SEG38 D6 SEG29 E6 SEG26 F6 SEG22 G6 SEG17 H6 SEG16
A7 SEG37 B7 SEG35 C7 SEG33 D7 SEG28 E7 SEG24 F7 SEG23 G7 SEG19 H7 SEG18
A8 SEG36 B8 SEG34 C8 SEG32 D8 SEG30 E8 SEG27 F8 SEG25 G8 SEG21 H8 SEG20
REV. B