BU9706KS Datasheet, PDF (3/6 Pages) Rohm – LCD segment driver

Standard ICs
BU9706KS
•^{Pin descriptions}
Pin No. Pin name I / O
2 ~ 41
O40
~ O1
O
43 ~ 45 V2 ~ V5
—
49
VDD
—
42
VSS
—
53
DI1
I
54
DO20
O
55
DI21
I
1
DO40
O
48
CP
I
47
LOAD
I
51
DF
I
Function
Output pin for the liquid crystal driver. VDD, V2, V3 or V5 is output depending on
the latch content and the DF signal. Refer to the truth table for the output level.
Power supply pin for liquid crystal drive
Logic power supply pin and liquid crystal drive power supply pin
Logic power supply pin
Data input pin for the shift register (1 to 20 bits). Data is read to the first bit of
the shift register at the clock signal falling edge.
Data output pin for the shift register (1 to 20 bits). Data is output in
synchronization with the clock signal falling edge. A 40-bit shift register is
accomplished by connecting pins 54 and 55.
Data input pin for the shift register (21 to 40 bits). Data is read to the 21st bit
of the shift register at the clock signal falling edge.
Data output pin for the shift register (21 to 40 bits). Data is output in synchronization
with the clock signal falling edge. It is used to configure an LCD driver with more
than 40 bits by connecting it to the DI pin of the BU9706KS at the next stage.
Clock signal input pin for the shift register. The contents of the shift register
are shifted by 1 bit only at the clock signal falling edge.
Latch signal input pin for the 40-bit latch. The contents of the shift register are
transferred to O₁ to O₄₀ at LOAD = "H" and the data is latched at LOAD = "L". While
LOAD = "L", the latched data is held even if the contents of the shift register change.
Input pin for the signal which produces AC for LCD drive.
•^{LCD drive output pin truth table}
Latch data
DF
On terminal voltage
H
H
V5
H
L
VDD
L
H
V3
L
L
V2
•^{Timing chart}
40
1
2
3
CP
39
40
1
2
DI1
LOAD
O1
O40
Load
O39
O38
O2
O1
O40
O39
Load
DF
• Shifted at CP input falling.
• When the LOAD input state becomes "H", the contents of the shift register are transferred to the segment
outputs O1 to O40, and when it is "L", the data is latched.
Fig.1
3