BU94705KV Datasheet, PDF (3/6 Pages) Rohm – Silicon Monolithic integrated circuit

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◇Description of Terminals
No.
Name
I/O
1
RESETX
I
2
TEST15
O
3
TEST16
O
4
SEL_SLAVE
I
5
SEL_MP3/INREQI
I
6
SEL_DOUT/LRCKI
I
7
SEL_VOL/BCKI
I
8
SEL_APLAY/SDATAI
I
9
SEL_UTPKT/BFULLO
I/O
10
DVSS
－
11
IRPTO
O
12
SEARCH
O
13
DVDDIO
－
14
KEY_ROW1/MCHNG
I/O
15
KEY_ROW2/BUSY
I/O
16
KEY_ROW3/SCL
I
17
KEY_ROW4/SDA
I/O
18
KEY_COL1/A0
O/I
19
KEY_COL2/A1
O/I
20
KEY_COL3/SEL_I2C
O/I
21
SD_WP
I
22
SD_CON
I
23
SD_DO
I
24
SD_CLK
O
25
SD_DI
O
26
SD_CS
O
27
DVSS
－
28
FL_CS
O
29
TEST/CLK12MO
I/O
30
TEST5
O
31
TEST6
I
32
TEST7
I
33
DVDDIO
－
34
TEST8
I
35
TEST9
I
36
TEST10
O
37
DVSS
－
38
DVDD_M2
－
39
ATEST1
O
40
AVDDC
－
41
USB_DM
I/O
42
USB_DP
I/O
43
AVSSC
－
44
REXTI
O
45
VOREFI
O
46
VSS_PLL
－
47
TEST_PLL1
I
48
XIN_PLL
I
49
XOUT_PLL
O
50
TEST_PLL2
O
51
VDD_PLL
－
52
DAVSS
－
53
RDACO
O
54
VCDACO
O
55
LDACO
O
56
DAVDD
－
57
DVSS
－
58
AMUTE
O
59
TEST11
O
Description of terminals
System reset terminal
[TEST15]Pull-up at 2.2k ohm to VDD1 system power supply terminal(TEST PIN)
[TEST16]Pull-up at 2.2k ohm to VDD1 system power supply terminal(TEST PIN)
Slave mode selection（H：Stand Alone mode, L：Slave mode）
[SEL_MP3]MPEG Audio Layer selection（H：Only MP3, L：MP1, MP2 and MP3 can be playback）, [INREQI]Input data valid
[SEL_DOUT]Digital Audio out selection（H：Disable、L：Enable）, [LRCKI]Digital Audio channel clock input terminal
[SEL_VOL] Volume operation selection（H：Volume+- Effective, L：VOL+-Inavalidity）, [BCKI]Digital Audio bit clock input terminal
[SEL_APLAY] At device(USB,SD) connection, Auto Play mode selection(H:It stop, L:It playback),
[SDATAI]Digital Audio data input terminal
[SEL_UTPKT] USB test packet output selection（H：Normal、L：Test packet）,[BFULLO]Input buffer FULL flag output terminal
GND terminal
To HOST interruption output terminal
Search flag terminal
IO Power supply(VDD1) terminal
[KEY_ROW1]KEY Matrix terminal, [MCHNG]Music change flag terminal
[KEY_ROW2]KEY Matrix terminal, [BUSY]Busy flag terminal
[KEY_ROW3]KEY Matrix terminal, [SCL]I²C slave clock I/F input terminal
[KEY_ROW4]KEY Matrix terminal, [SDA]I²C slave data I/F terminal
[KEY_COL1]KEY Matrix terminal, [A0]I²C slave address selection
[KEY_COL2]KEY Matrix terminal, [A1]I²C slave address selection
[KEY_COL3]KEY Matrix terminal, [SEL_I2C]Pull-up to VDD1 system power supply terminal
SD card Write Protect terminal
SD card Connect terminal
SD card Data In terminal
SD card Clock terminal
SD card Data Out terminal
SD card Chip select terminal
GND terminal
Serial FLASH ROM Chip select terminal
[TEST] Pull-up to VDD1 system power supply terminal(TEST PIN), [CLK12MO]12MHz clock output terminal
[TEST5]OPEN (TEST PIN)
[TEST6]Pull-up to VDD1 system power supply terminal(TEST PIN)
[TEST7]Pull-up to VDD1 system power supply terminal(TEST PIN)
IO Power supply(VDD1) terminal
[TEST8]Pull-up to VDD1 system power supply terminal(TEST PIN)
[TEST9]Pull-up to VDD1 system power supply terminal(TEST PIN)
OPEN (TEST PIN, IPL ERROR Flag output)
GND terminal
CORE Power supply(VDD2) monitor terminal. Connect to DVDD_M1 pin.
USB TEST terminal(TEST PIN), OPEN
USB Power supply(VDD1)terminal
USB D－I/O terminal
USB D+ I/Oterminal
USB GND terminal
USB bias resistor(12kΩ) connecting terminal
USB TEST terminal(TEST PIN), OPEN
PLL GND terminal
PLL TEST terminal(TEST PIN), OPEN
X'tal(16.9344MHz) connecting input terminal
X'tal(16.9344MHz) connecting output terminal
PLL TEST terminal(TEST PIN), Pull-up to VDD1 system power supply terminal
PLL Power supply(VDD1) terminal
Audio DAC GND terminal
Audio DAC Rch Line output terminal
Audio DAC Reference voltage output teminal
Audio DAC Lch Line output terminal
Audio DAC Power supply(VDD1) terminal
GND terminal
Audio Mute output terminal（H：MUTE OFF, L：MUTE ON）
OPEN (TEST PIN)
REV. A