BU7961GUW Datasheet, PDF (3/5 Pages) Rohm – Silicon Monolithic Integrated Circuit

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4. PACKAGE VIEW
1PIN
MARK
BU7961
Lot No.
5.0±0.1
S
0.08 S
0.75±0.1
63-φ0.295±0.05
0.05 M S AB
H
G
F
E
D
C
B
A
A
P = 0.5×7
0.5
1 234 56 7 8
VBGA063W050
6. SYSTEM BLOCK DIAGRAM
IOVDD DVDD
(UNIT:mm)
PD
CKD
I/F
Logic
Odd
Parity
5. PIN LIST
Pin Pin
Pin Pin
Pin Pin
No. name No. name
No. name
A1 TEST0 D1 PD22
G1 CKD
A2 PD18 D2 PD20
G2 RVS
A3 PD16 D3 POL_PCLK G3 DRVR
A4 PD15 D4 DGND
G4 MSGND
A5 PD13 D5 DGND
G5 MSVDD
A6 PD12 D6 IOVDD
G6 LS1
A7 PD9 D7 PD3
G7 LS_EN
A8 TEST2 D8 PD4
G8 XSD
B1
E1 PD24
H1 TESTA
B2 PCLK E2 PD23
H2 D1+
B3 PD17 E3 IOVDD
H3 D1-
B4 PD14 E4 DGND
H4 CLK+
B5 PD11 E5 MSGND
H5 CLK-
B6 PD10 E6 PLL_BW0 H6 DO+
B7 PD8 E7 PD0
H7 D0-
B8 PD7 E8 PD2
H8 TEST1
C1 PD21 F1 PD25
C2 PD19 F2 PD26
C3 DVDD F3 MSVDD
C4 IOVDD F4 MSGND
C5 TEST3 F5 MSVDD
C6 DVDD F6 LS0
C7 PD6 F7 PLL_BW1
C8 PD5 F8 PD1
Parallel
to
Serial
MSVDD
High Speed I/F
D0+
D0-
D1+
D1-
PCLK
PCLK
Control
PLL
Tx
Timing
Generator
Tx
CLK+
CLK-
XSD
LS
RVS
POL_PCLK
PLL_BW
TEST
Clock
Detection
Reset
Generator
Control
Logic
DGND
Reference
LS_EN
DRVR
MSGND
REV. A