English
Language : 

BU2879AK Datasheet, PDF (3/5 Pages) Rohm – FL tube driver
Standard ICs
BU2879AK
•Pins descriptions
Pin No.
Pin
14, 38
VDD
44
OSC
7, 43
VSS
6
SI
5
SO
8
SCK
9
CS
15 ~ 25 S1 ~ S11
27
42 ~ 39,
37 ~ 32
26,
28 ~ 31
VEE
G1 ~ G10
S12 / G15
S16 / G11
Name
Power supply pin 1
Oscillation pin
Ground pin
Serial data input
Serial data output
Serial clock input
Serial chip select
High-voltage withstand
output pin for segment
Power supply pin 2
High-voltage withstand
output pin for grid
I/O
Function
Input
Connected to system power supply.
Input / output Capacitor connection pin for oscillation
Input
Connected to system ground.
Input
Serial data input starting from MSB
Output
Serial data output starting from MSB;
output is Nch open drain.
Input
Serial data read at rising edge.
Input
Serial initialization when LOW, valid at HIGH.
Output
Output pin for segment; output is
Pch open drain + pull-down resistance.
Input
Pull-down resistance connection for FLP driver output.
Output
Output pin for grid; output is Pch
open drain + pull-down resistance.
High-voltage withstand
output pin for segment / grid
Output
Used to switch output between segment and grid;
output is Pch open drain + pull-down resistance.
10 ~ 13
K1 ~ K4 Key data input pin
Input
Data input pin for key scanning.
1 ~ 4 SW1 ~ SW4 General-purpose input pin
Input
General-purpose input pin; input data can be
transmitted serially to microcomputer.
•Electrical characteristics (unless otherwise noted, Ta = 25°C, VDD = 5V, VSS = 0V, VDD – VEE = 35V)
Parameter
Symbol Min. Typ. Max. Unit
Conditions
Supply current
IDD
——
5
mA 44-pin attachment, at 1000pF oscillation
Measurement
circuit
Fig.1
Input threshold voltage
VIN
1.5 — 3.5
V Pins 1 to 4, 6, 8, 9 to 13
Fig.4
Input current
IIN
— — 10 µA Pins 1 to 4, 6, 8, 9 to 13
Fig.2
OSC oscillation frequency
FOSC 130 200 300 kHz 44-pin attachment, at 1000pF oscillation
Fig.3
Segment output current
IOseg 6
—
—
mA Pins 15 to 26, 28 to 31, VO = VDD – 2V∗
Fig.2
Grid output current
IOgrd
18
—
—
mA Pins 26, 28 to 37, 39 to 42, VO = VDD – 2V∗
Fig.2
Leakage current when OFF
IOFF
—
—
10
µA Pins 15 to 26, 28 to 37, VO = VDD – VEE
Fig.2
Output pull-down resistance
RD
35 70 140 kΩ Pins 15 to 26, 28 to 37
Fig.2
Maximum operating frequency FMAX — —
1 MHz Design guarantee value
Fig.3
〈Serial transmission〉
Input data hold
TSH 0.16 —
—
µs
—
—
Input data setup
TSS 0.16 —
—
µs
—
—
Output data delay
TD
— — 0.3 µs
—
—
Input clock cycle
TSCYC 0.5
—
—
µs
—
—
Input clock "H" width
TSW
40
—
60
% At minimum input clock cycle
—
∗ For the high voltage withstand output pins for the segment / grid of pins 26 and 28 to 31, when segment output is specified, segment output current is output, and
when grid output is specified, grid current is output.
3