BU2506FV_11 Datasheet, PDF (3/11 Pages) Rohm – High-precision 10bit 8ch/10ch D/A Converters

BU2506FV,BU2505FV
Technical Note
●Timing Characteristics(Unless otherwise specified, VCC=5V, VrefH=5V, VrefL=0V, Ta=25℃)
Parameter
Symbol
Limits
MIN. TYP. MAX.
Unit
Conditions
Judgment level is 80% / 20% of VCC.
Reset L pulse width
tRTL
50
-
-
-
Clock L pulse width
tCKL
50
-
-
-
Clock H pulse width
tCKH
50
-
-
-
Clock rise time
tcr
-
-
50
-
Clock fall time
tcf
-
-
50
-
Data setup time
tDCH
20
-
-
nS
-
Data hold time
tCHD
40
-
-
-
Load setup time
tCHL
50
-
-
-
Load hold time
tLDC
50
-
-
-
Load H pulse width
tLDH
50
-
-
-
Data output delay time
DA output settling time
tDO
-
tLDD
-
-
90
CL=100pF
CL≦100pF, VO: 0.5V⇔4.5V.
7
20
μS Until output value deference from final
value becomes 1/2LSB.
RESET
CLK
DI
LD
DA
OUTPUT
DO
OUTPUT
tRTL
tcr
tCKL
tCKH
tcf
tDCH tCHD tCHL
tDo
tLDH
tLDC
tLDD
(note) LD signal is level triggered. When LD input is on H level, internal shift-register state is loaded to DAC control latch.
Clock transition during LD=H is inhibited.
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3/10
2011.04 - Rev.B